Related papers: High Performance GNR Power Gating for Low-Voltage …

In this paper, we propose a new trench power MOSFET with strained Si channel that provides lower on resistance than the conventional trench MOSFET. Using a 20% Ge mole fraction in the Si1-xGex body with a compositionally graded Si1-xGex…

The energy efficiency of neural processing units (NPU) is playing a critical role in developing sustainable data centers. Our study with different generations of NPU chips reveals that 30%-72% of their energy consumption is contributed by…

This paper describes a CMOS analogy voltage supper buffer designed to have extremely low static current Consumption as well as high current drive capability. A new technique is used to reduce the leakage power of class-AB CMOS buffer…

With the high demand of the portable electronic products, Low- power design of VLSI circuits & Power dissipation has been recognized as a challenging technology in the recent years. PLA (Programming logic array) is one of the important off…

We report the realization of top-gated graphene nanoribbon field effect transistors (GNRFETs) of ~10 nm width on large-area epitaxial graphene exhibiting the opening of a band gap of ~0.14 eV. Contrary to prior observations of disordered…

This paper proposes a novel approach using Graph Neural Networks (GNNs) to solve the AC Power Flow problem in power grids. AC OPF is essential for minimizing generation costs while meeting the operational constraints of the grid.…

Gate-all-around (GAA) nanowire (NW) field-effect transistor (FET) is a promising device architecture due to its superior gate controllability than that of the conventional FinFET architecture. The significantly higher electron mobility of…

A graphene field effect transistor, where the active area is made of monolayer large-area graphene, is simulated including a full 2D Poisson equation and a drift-diffusion model with mobilities deduced by a direct numerical solution of the…

A graphene field-effect-transistor (GFET) model calibrated with extracted device parameters and a commercial 65 nm silicon MOSFET model are compared with respect to their radio frequency behavior. GFETs slightly lag behind CMOS in terms of…

A simple but novel driver system has been developed to operate the wire gating grid of a Time Projection Chamber (TPC). This system connects the wires of the gating grid to its driver via low impedance transmission lines. When the gating…

Now a days, power has become a primary consideration in hardware design, and is critical in computer systems especially for portable devices with high performance and more functionality. Clock-gating is the most common technique used for…

This paper investigates the use of carbon nanotube field effect transistors (CNFETs) for the design of ternary full adder cells. The proposed circuits have been designed based on the unique properties of CNFETs such as having desired…

A fresh look on carbon-based transistor channel materials like single-walled carbon nanotubes (CNT) and graphene nanoribbons (GNR) in future electronic applications is given. Although theoretical predictions initially promised that GNR…

Floating gate transistor is the basic building block of non-volatile flash memory, which is one of the most widely used memory gadgets in modern micro and nano electronic applications. Recently there has been a surge of interest to…

A low complexity computational model of the current-voltage characteristics for graphene nano-ribbon (GNR) field effect transistors (FET), able to simulate a hundred of points in few seconds using a PC, is presented. For quantum capacitance…

In this paper, we propose a simulation-based novel Split-Gate Trench MOSFET structure with an optimized fabrication process to enhance power efficiency, switching speed, and thermal stability for high-performance semiconductor applications.…

Traditional silicon binary circuits continue to face challenges such as high leakage power dissipation and large area of interconnections. Multiple-Valued Logic (MVL) and nano devices are two feasible solutions to overcome these problems.…

Here, we propose a Charge Plasma (CP)-based Germanium Double Gate Tunnel Field-Effect Transistor (Ge-DGTFET) device structure, where a CP is induced in the heavily doped source region using the work function engineering of source electrode.…

As the semiconductor manufacturing process technology node shrinks into the nanometer-scale, the CMOS-based Field Programmable Gate Arrays (FPGAs) face big challenges in scalability of performance and power consumption. Multi-walled Carbon…

Using recently available GaN FETs, a 600 Volt three-stage, multi-FET switch has been developed having 2 nanosecond rise time driving a 200 Ohm load with the potential of approaching 30 MHz average switching rates. Possible applications…