Related papers: Negative Capacitance as Digital and Analog Perform…

Degradation of metal-insulator-semiconductor (MIS) capacitors of gold/Parylene-C/Pentacene under constant voltage stress (CVS) was investigated to explore the electrical stability and reliability of Parylene C as a gate dielectric in…

A modular, programmable, and high performance Power Gating strategy, called cluster based tunable sleep transistor cell Power Gating, has been introduced in the present paper with a few modifications. Furthermore, a detailed comparison of…

The equation describing the capacitance of capacitors is determined. It is shown that by optimizing the material of the conducting electrodes, the capacitance of capacitors reaching the quantum regime can be substantially enhanced or…

Process-related and stress-induced changes in threshold voltage are major variability concerns in ultra-scaled CMOS transistors. The device designers consider this variability as an irreducible part of the design problem and use different…

We report on an artificial synapse, an organic synapse-transistor (synapstor) working at 1 volt and with a typical response time in the range 100-200 ms. This device (also called NOMFET, Nanoparticle Organic Memory Field Effect Transistor)…

In this paper, we present the dynamics and modeling of multi-domains in the ferroelectric FET (FeFET). Due to the periodic texture of domains, the electrostatics of the FeFET exhibit an oscillatory conduction band profile. To capture such…

The AlGaN/GaN quantum-well heterostructures typically exhibit a positive photoconductivity (PPC) during the light illumination. Surprisingly, we found that introducing the GaN/AlN superlattice (SL) back barrier into N-polar AlGaN/GaN…

With the increasing digital services demand, performance and power-efficiency become vital requirements for digital circuits and systems. However, the enabling CMOS technology scaling has been facing significant challenges of device…

To achieve high performance thermoelectric materials and devices, thermoelectric transistors, which integrate thermoelectric effects with transistor technology, represent a promising approach. Here p type Bi0.5Sb1.5Te3 and n type…

We report on a healing of defects at room temperature in the organic semiconductor pentacene. This peculiar effect is a direct consequence of the weak intermolecular interaction which is characteristic of organic semiconductors. Pentacene…

Physical phenomena underlying operation of ferroelectric field-effect transistors (FeFETs) is treated within a unified simulation framework. The framework incorporates the Landau mean-field treatment of free energy of a ferroelectric and…

While negative capacitance has been demonstrated in ferroelectric-dielectric heterostructures in the form of capacitance enhancement, all experimental evidence, to date, suggests the existence of domains therein. Here, we address the…

Narrow-channel accumulated body nMOSFET devices with p-type side-gates surrounding the active area have been electrically characterized between 100 and 400 K with varied side-gate biasing (Vside). The subthreshold slope (SS) and drain…

We report the design-technology co-optimization (DTCO) scheme to develop a 28-nm cryogenic CMOS (Cryo-CMOS) technology for high-performance computing (HPC). The precise adjustment of halo implants manages to compensate the threshold voltage…

Organic semiconductors have attracted increasing interest as thermoelectric converters in recent years due to their intrinsically low thermal conductivity compared to inorganic materials. This boom has led to encouraging practical results,…

The effect of polarization rotation on the performance of metal oxide semiconductor field-effect transistors was investigated with a Landau-Ginzburg-Devonshire theory based model. In this analytical model, depolarization field, polarization…

Most attention to improving vacuum thermionic energy conversion device (TEC) technology has been on improving electron emission with little attention to collector optimization. A model was developed to characterize the output…

Full Adder is one of the critical parts of logical and arithmetic units. So, presenting a low power full adder cell reduces the power consumption of the entire circuit. Also, using Nano-scale transistors, because of their unique…

Low-temperature experiments are performed on novel nanoscale nonlinear devices (ballistic rectifiers) as well as nano-structured artificial materials, fabricated from an InP/InGaAs quantum well wafer. A DC output is generated between the…

We present a model for the leakage current in ferroelectric thin- film capacitors which explains two of the observed phenomena that have escaped satisfactory explanation, i.e. the occurrence of either a plateau or negative differential…