Related papers: Negative Capacitance Tunnel Field Effect Transisto…

We report a strategy to design nanoscale cold-source field-effect transistors (CS-FETs) with bias-independent sub-60 mV/dec subthreshold swing (SS). By first-principles calculations and quantum-transport simulations, we reveal that the…

The effect of polarization rotation on the performance of metal oxide semiconductor field-effect transistors was investigated with a Landau-Ginzburg-Devonshire theory based model. In this analytical model, depolarization field, polarization…

Theoretical predictions are made for the current-voltage characteristics of two-dimensional heterojunction interlayer tunneling field-effect transistors (Thin-TFETs), focusing on the magnitude of the current that is achievable in such…

High performance p- and n-type single-walled carbon nanotube (SWNT) field-effect transistors (FETs) are obtained by using high and low work function metals, Pd and Al as source/drain (S/D) electrodes respectively. Ohmic contacts made to…

Physical phenomena underlying operation of ferroelectric field-effect transistors (FeFETs) is treated within a unified simulation framework. The framework incorporates the Landau mean-field treatment of free energy of a ferroelectric and…

A spin metal-oxide-semiconductor field-effect-transistor (spin MOSFET), which combines a Schottky-barrier MOSFET with ferromagnetic source and drain contacts, is a promising device for spintronic logic. Previous simulation studies predict…

In this work, an analytic model is proposed which provides in a continuous manner the current-voltage characteristic (I-V) of high performance tunneling field-effect transistors (TFETs) based on direct bandgap semiconductors. The model…

We investigate the design of steep-slope metal-oxide-semiconductor field-effect transistors (MOSFETs) exploiting monolayers of transition metal dihalides as channel materials. With respect to other previously proposed steep-slope…

For high-electron-mobility transistors based on two-dimensional electron gas (2DEG) within a quantum well, such as those based on AlGaN/GaN heterostructure, a Schottky-gate is used to maximize the amount of charge that can be induced and…

We fabricated and characterized a new spin-functional MOSFET referred to as a pseudo-spin-MOSFET (PS-MOSFET). The PS-MOSFET is a circuit using an ordinary MOSFET and magnetic tunnel junction (MTJ) for reproducing functions of…

Vertical field effect transistors (VFETs) show many advantages such as high switching speed, low operating voltage, low power consumption, and miniaturization over lateral FETs. However, VFET still faces the main challenges of high…

The pressing quest for overcoming Boltzmann tyranny in low-power nanoscale electronics revived the thoughts of engineers of early 1930-s on the possibility of negative circuit constants. The concept of the ferroelectric-based negative…

We report the realization of top-gated graphene nanoribbon field effect transistors (GNRFETs) of ~10 nm width on large-area epitaxial graphene exhibiting the opening of a band gap of ~0.14 eV. Contrary to prior observations of disordered…

A comprehensive study of the scaling of negative capacitance FinFET (NC-FinFET) is conducted with TCAD. We show that the NC-FinFET can be scaled to "2.1nm node" and almost "1.5nm node" that comes two nodes after the industry "3nm node,"…

Nontrivial capacitance behavior, including a negative capacitance (NC) effect, observed in a variety of semiconductor devices, is discussed emphasizing the physical mechanism and the theoretical interpretation of experimental data. The…

A physics-based compact model for silicon gate-all-around (GAA) nanowire tunneling FETs (NW-tFETs) with good accuracy has been developed by considering Phonon-Assisted Tunneling (PAT) and transition from Quantum Capacitance Limit (QCL) to…

In this letter we discuss how the short channel behavior in sub 100 nm channel range can be improved by inducing a step surface potential profile at the back gate of an asymmetrical double gate (DG) Silicon-On-Insulator (SOI)…

The topological quantum field-effect transition in buckled 2D-Xenes can potentially be engineered to enable sub-thermionic transistor operation coupled with dissipationless ON-state conduction. Substantive device design strategies to…

This work reports the design and analysis of an n-type tunneling field effect transistor based on InN. The tunneling current is evaluated from the fundamental principles of quantum mechanical tunneling and semiclassical carrier transport.…

This paper reviews the current status of graphene transistors as potential supplement to silicon CMOS technology. A short overview of graphene manufacturing and metrology methods is followed by an introduction of macroscopic graphene field…