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Challenges at the quantum-classical interface are examined with the goal of architecting a scaled-up quantum computer comprising many thousands of qubits in the solid-state. Separating the distinct sub-systems of the interface that perform…

Quantum Physics · Physics 2019-12-12 D. J. Reilly

Two-dimensional (2D) semiconductors have been suggested both for ultimately-scaled field-effect transistors (FETs) and More-than-Moore nanoelectronics. However, these targets can not be reached without accompanying gate insulators which are…

The most promising quantum algorithms require quantum processors hosting millions of quantum bits when targeting practical applications. A major challenge towards large-scale quantum computation is the interconnect complexity. In current…

We challenge the current thinking and approach to the design of photonic integrated circuits (PICs) for applications in communications, quantum information and sensing. The standard PICs are based on directional couplers, that provide a…

Quantum computing is experiencing the transition from a scientific to an engineering field with the promise to revolutionize an extensive range of applications demanding high-performance computing. Many implementation approaches have been…

Quantum Physics · Physics 2023-10-06 Reza Nikandish , Elena Blokhina , Robert Bogdan Staszewski

As with most aspects of electronic systems and integrated circuits, hardware security has traditionally evolved around the dominant CMOS technology. However, with the rise of various emerging technologies, whose main purpose is to overcome…

Cryptography and Security · Computer Science 2021-06-01 Johann Knechtel

Silicon carbide is a wide-bandgap semiconductor with an emerging CMOS technology platform and it is widely deployed in high power and harsh environment electronics. This material is also attracting interest for quantum technologies through…

Applied Physics · Physics 2026-05-05 Megan Powell , Euan Parry , Conor McGeough , Alexander Zotov , Alessandro Rossi

Modern computing workloads demand energy-efficient, high-bandwidth interconnects, motivating photonic interposers as an alternative to electrical links. Here we demonstrate a compact 3D silicon nitride (SiN) photonic interposer prototype…

Complex integrated circuits require multiple wiring layers. In complementary metal-oxide-semiconductor (CMOS) processing, these layers are robustly separated by amorphous dielectrics. These dielectrics would dominate energy loss in…

The many cores design research community have shown high interest in optical crossbars on chip for more than a decade. Key properties of optical crossbars, namely a) contention free data routing b) low latency communication and c) potential…

Emerging Technologies · Computer Science 2015-12-24 Hui Li , Sébastien Le Beux , Gabriela Nicolescu , Jelena Trajkovic , Ian O 'Connor

Microfluidic cooling has been recognized as one of the most promising solutions to achieve efficient thermal management for three-dimensional integrated circuits (3DICs). It enables more opportunities to architect 3DICs with different die…

Hardware Architecture · Computer Science 2024-04-01 Runxi Wang , Jun-Han Han , Mircea Stan , Xinfei Guo

As spatial and temporal resolutions of scientific instruments improve, the explosion in the volume of data produced is becoming a key challenge. It can be a critical bottleneck for integration between scientific instruments at the edge and…

Instrumentation and Detectors · Physics 2021-11-03 Kazutomo Yoshii , Rajesh Sankaran , Sebastian Strempfer , Maksim Levental , Mike Hammer , Antonino Miceli

Synaptic dynamics, such as long- and short-term plasticity, play an important role in the complexity and biological realism achievable when running neural networks on a neuromorphic IC. For example, they endow the IC with an ability to…

Scaling up hardware systems has become an important tactic for improving performance as Moore's law fades. Unfortunately, simulations of large hardware systems are often a design bottleneck due to slow throughput and long build times. In…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-31 Steven Herbst , Noah Moroze , Edgar Iglesias , Andreas Olofsson

For a system-level design of Networks-on-Chip for 3D heterogeneous System-on-Chip (SoC), the locations of components, routers and vertical links are determined from an application model and technology parameters. In conventional methods,…

Hardware Architecture · Computer Science 2019-10-04 Jan Moritz Joseph , Dominik Ermel , Lennart Bamberg , Alberto García-Ortiz , Thilo Pionteck

Quantum hardware based on circuit quantum electrodynamics makes extensive use of airbridges to suppress unwanted modes of wave propagation in coplanar-waveguide transmission lines. Airbridges also provide an interconnect enabling…

Quantum Physics · Physics 2025-03-19 T. Stavenga , L. DiCarlo

2.5D integration is an important technique to tackle the growing cost of manufacturing chips in advanced technology nodes. This poses the challenge of providing high-performance inter-chiplet interconnects (ICIs). As the number of chiplets…

Hardware Architecture · Computer Science 2023-10-10 Patrick Iff , Maciej Besta , Matheus Cavalcante , Tim Fischer , Luca Benini , Torsten Hoefler

The CMOS integrated chips at advanced technology nodes are becoming more vulnerable to various sources of faults like manufacturing imprecisions, variations, aging, etc. Additionally, the intentional fault attacks (e.g., high power…

Hardware Architecture · Computer Science 2018-07-08 Naveen Kumar Macha , Bhavana Tejaswini Repalle , Sandeep Geedipally , Rafael Rios , Mostafizur Rahman

Recent advancements in deep learning have led to the widespread adoption of artificial intelligence (AI) in applications such as computer vision and natural language processing. As neural networks become deeper and larger, AI modeling…

Hardware Architecture · Computer Science 2020-09-30 Eugene Tam , Shenfei Jiang , Paul Duan , Shawn Meng , Yue Pang , Cayden Huang , Yi Han , Jacke Xie , Yuanjun Cui , Jinsong Yu , Minggui Lu

Inverse design coupled with adjoint optimization is a powerful method to design on-chip nanophotonic devices with multi-wavelength and multi-mode optical functionalities. Although only two simulations are required in each iteration of this…

Applied Physics · Physics 2023-07-12 Ahmet Onur Dasdemir , Victor Minden , Emir Salih Magden
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