Related papers: A New Design for Array Multiplier with Trade off i…
In this paper, two approximate 3*3 multipliers are proposed and the synthesis results of the ASAP-7nm process library justify that they can reduce the area by 31.38% and 36.17%, and the power consumption by 36.73% and 35.66% compared with…
We propose a new technique for multiple-input multiple-output (MIMO) radar with colocated antennas which we call phased-MIMO radar. The new technique enjoys the advantages of MIMO radar without sacrificing the main advantage of phased-array…
There is an extremely high demand for a high speed, low power, low leakage, and low noise Static Random-Access Memory (SRAM) for high performance cache memories. The energy efficiency of SRAM is of paramount importance in both high…
Massively pre-trained transformer models are computationally expensive to fine-tune, slow for inference, and have large storage requirements. Recent approaches tackle these shortcomings by training smaller models, dynamically reducing the…
To build a large scale quantum circuit comprising millions of cryogenic qubits will require an efficient way to supply large numbers of classic control signals. Given the limited number of direct connections allowed from room temperature,…
In this contribution, it is proposes to limit the quantization search space of a successive approximation analog-to-digital converter through an analytic derivation of maximum possible sample-to-sample variation. The presented example…
Approximate computing is emerging as an alternative to accurate computing due to its potential for realizing digital circuits and systems with low power dissipation, less critical path delay, and less area occupancy for an acceptable…
We compare the implementation of a 8x8 bit multiplier with two different implementations of a 4x4 quaternary digit multiplier. Interfacing this binary multiplier with quaternary to binary decoders and binary to quaternary encoders leads to…
In this paper, a joint transmitter and receiver design for pattern division multiple access (PDMA) is proposed. At the transmitter, pattern mapping utilizes power allocation to improve the overall sum rate, and beam allocation to enhance…
The study considers a three-node, two-way relaying network (TWRN) over a multi-carrier system, aiming to minimize the total power consumption of all the transmit and receiver activities. By employing digital network coding (DNC) and…
A compact reflection-type phaser composed of quarter-wavelength transmission line resonators interconnected by alternating K- and J-inverters is proposed. A design method is also presented. To validate this method, a 4th-order example is…
An analog neural network computing engine based on CMOS-compatible charge-trap transistor (CTT) is proposed in this paper. CTT devices are used as analog multipliers. Compared to digital multipliers, CTT-based analog multiplier shows…
The flexibility of multi-terminal AC-DC-AC converters connected in distribution networks can be increased by changing the sizes of the individual AC-DC converter stages and connecting the AC side of those converters to electromechanical…
This paper presents the designs of asynchronous early output dual-bit full adders without and with redundant logic (implicit) corresponding to homogeneous and heterogeneous delay-insensitive data encoding. For homogeneous delay-insensitive…
Transformers are central to advances in artificial intelligence (AI), excelling in fields ranging from computer vision to natural language processing. Despite their success, their large parameter count and computational demands challenge…
Multiplication is an indispensable operation in most of digital signal processing systems. Recently, many systems need to execute different types of algorithms on a multiplier. Therefore, it needs complicated computation and large area…
This paper introduces new approaches for combining non-orthogonal multiple access with distributed antenna systems. The study targets a minimization of the total transmit power in each cell, under user rate and power multiplexing…
Low resolution analog-to-digital converters (ADCs) can be employed to improve the energy efficiency (EE) of a wireless receiver since the power consumption of each ADC is exponentially related to its sampling resolution and the hardware…
We present a framework for joint amplification and phase shift optimization of the repeater gain in dynamic time-division duplex (TDD) repeater-assisted massive MIMO networks. Repeaters, being active scatterers with amplification and phase…
This paper addresses a novel five-transistor (5T) CMOS SRAM design with high performance and reliability in 65nm CMOS, and illustrates how it reduces the dynamic power consumption in comparison with the conventional and low-power 6T SRAM…