Related papers: Balanced ternary addition using a gated silicon na…

We have incorporated an aluminum single electron transistor (SET) directly on top of a vertical quantum dot, enabling the use of the SET as an electrometer that is extremely responsive to the motion of charge into and out of the dot. Charge…

Single electron transistors (SETs) are fabricated by placing single walled carbon nanotubes (SWNTs) on a 100 nm wide local Al/Al2O3 bottom gate and then contacting with Pd electrodes. Coulomb oscillations up to 125 K were observed and…

We report on millikelvin charge sensing measurements of a silicon double-dot system fabricated by phosphorus ion implantation. An aluminum single-electron transistor (SET) is capacitively coupled to each of the implanted dots enabling the…

Qutrit (or ternary) structures arise naturally in many quantum systems, particularly in certain non-abelian anyon systems. We present efficient circuits for ternary reversible and quantum arithmetics. Our main result is the derivation of…

The MUX implementation of ternary half adders and full adders using predecessor and successor functions lead to the most efficient efficient implementation using the smallest transistor count. These designs are compared with the binary…

We discuss the operation of the superconductor - insulator - normal-metal - insulator - superconductor (SINIS) turnstile. This voltage-biased hybrid single-electron transistor (SET) provides current quantization even with only one…

We analyze the noise properties of two single electron transistors (SETs) coupled via a shared voltage gate consisting of a nanomechanical resonator. Working in the regime where the resonator can be treated as a classical system, we find…

In the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not…

We report on the fabrication and electrical characterization at millikelvin temperatures of a novel silicon single-electron transistor (Si-SET). The island and source-drain leads of the Si-SET are formed by the implantation of phosphorus…

We consider a hybrid single-electron transistor (SET) constituted by a gate-controlled normal-metal island (N) connected to two voltage-biased superconducting leads (S) by means of two tunnel junctions (S-I-N-I-S), operated as a turnstile.…

In the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not…

Electrostatically Formed Nanowire (EFN) based transistors have been suggested in the past as gas sensing devices. These transistors are multiple gate transistors in which the source to drain conduction path is determined by the bias applied…

Transistors, regardless of their size, rely on electrical gates to control the conductance between source and drain contacts. In atomic-scale transistors, this conductance is exquisitely sensitive to single electrons hopping via individual…

We have fabricated single-electron transistors from individual metal nanoparticles using a geometry that provides improved coupling between the particle and the gate electrode. This is accomplished by incorporating a nanoparticle into a gap…

This paper introduces a conceptual framework of technology-dependent ternary quantum gates that could be implemented and fabricated into future superconducting and photonic quantum systems for operating 3-valued quantum bits (qutrits). The…

This paper investigates the use of carbon nanotube field effect transistors (CNFETs) for the design of ternary full adder cells. The proposed circuits have been designed based on the unique properties of CNFETs such as having desired…

The single electron transistor (SET) offers unparalled opportunities as a nano-scale electrometer, capable of measuring sub-electron charge variations. SETs have been proposed for read-out schema in solid-state quantum computing where…

Inspired by recent experimental realizations and theoretical simulations of thin silicon nanowire-based devices, we perform predictive first-principles simulations of junctionless gated Si nanowire transistors. Our primary predictions are…

We report on ambipolar gate-defined quantum dots in silicon on insulator (SOI) nanowires fabricated using a customised complementary metal-oxide-semiconductor (CMOS) process. The ambipolarity was achieved by extending a gate over an…

Solution processed field-effect transistors based on single crystalline silicon nanowires (Si NWs) with metal Schottky contacts are demonstrated. The semiconducting layer was deposited from a nanowire ink formulation at room temperature.…