Related papers: Intrinsic Reliability improvement in Biaxially Str…
In this paper, we propose a new trench power MOSFET with strained Si channel that provides lower on resistance than the conventional trench MOSFET. Using a 20% Ge mole fraction in the Si1-xGex body with a compositionally graded Si1-xGex…
We propose and demonstrate a relaxed-SiGe/strained-Si (SiGe/s-Si) enhancement-mode gate stack for quantum dots. The enhancement-mode SiGe/s-Si structure is pursued because it spaces the quantum dot away from charge and spin defect rich…
SiGe islands are used to induce tensile strain in the Si channel of Field Effect Transistors to achieve larger transconductance and higher current driveabilities. We report on x-ray diffraction experiments on a single fully-processed and…
Based on Monte Carlo simulation, we report the study of the inversion layer mobility in n-channel strained Si/ Si1-xGex MOS structures. The influence of the strain in the Si layer and of the doping level is studied. Universal mobility…
Understanding the interactions between strain, interfacial mechanics, and electrical performance is critical for designing beyond silicon electronics based on hetero-integrated 2D materials. Through combined experiment and simulation, we…
We investigate the effect of electrostatic gating on the thermoelectric power factor of p-type Si nanowires (NWs) of up to 20nm in diameter in the [100], [110] and [111] crystallographic transport orientations. We use atomistic…
The quality of the silicon-oxide interface plays a crucial role in fabricating reproducible silicon spin qubits. In this work we characterize interface quality by performing mobility measurements on silicon Hall bars. We find a peak…
Silicon carbide (SiC) metal-oxide-semiconductor field-effect-transistors (MOSFETs) enable high-voltage and high-temperature power conversion. Compared to Si devices, they suffer from pronounced gate leakage due to the reduced electron…
In this work, the source structure of an n-type thin-film tunneling FET is engineered to get better performance. An ultra-thin SiGe along with Si is used in the source of silicon-based TFET. Two structures are compared with conventional…
Strain-engineering in SiGe nanostructures is fundamental for the design of optoelectronic devices at the nanoscale. Here we explore a new strategy, where SiGe structures are laterally confined by the Si substrate, to obtain high tensile…
The prospect of achieving fault-tolerant quantum computing with semiconductor spin qubits in Si/SiGe heterostructures relies on the integration of a large number of identical devices, a feat achievable through a scalable (Bi)CMOS…
4H-Silicon Carbide (4H-SiC) possesses a high Baliga figure of merit, making it a promising material for power electronics. However, its applications are limited by its low hole mobility. Herein, we found that the hole mobility of 4H-SiC is…
We report the transport characteristics of both electrons and holes through narrow constricted crystalline Si "wall-like" long-channels that were surrounded by a thermally grown SiO2 layer. Importantly, as a result of the existence of fixed…
We report on the hole mobility of ultra-narrow [110] Si channels as a function of the confinement length scale. We employing atomistic bandstructure calculations and linearized Boltzmann transport approach. The phonon-limited mobility of…
We investigate the disorder properties of two-dimensional hole gases in Ge/SiGe heterostructures grown on Ge wafers, using thick SiGe barriers to mitigate the influence of the semiconductor-dielectric interface. Across several…
We report on detailed room temperature and low temperature transport properties of double-gate Si MOSFETs with the Si well thickness in the range 7-17 nm. The devices were fabricated on silicon-on-insulator wafers utilizing wafer bonding,…
In this paper, SiO2 layers deposited on 4H-SiC and subjected to different post deposition annealing (PDA) in NO and N2O were studied to identify the key factors influencing the channel mobility and threshold voltage stability in 4H-SiC…
We demonstrated that the spin injection/extraction efficiency is enhanced by an ultrathin Mg insertion layer (<= 2 nm) in Fe/Mg/MgO/n+-Si tunnel junctions. In diode-type vertical three-terminal devices fabricated on a Si substrate, we…
We engineer planar Ge/SiGe heterostructures for low disorder and quiet hole quantum dot operation by positioning the strained Ge channel 55~nm below the semiconductor/dielectric interface. In heterostructure field effect transistors, we…
We have experimentally and theoretically investigated the electron spin transport and spin distribution at room temperature in a Si two-dimensional (2D) inversion channel of back-gate-type spin metal-oxide-semiconductor field-effect…