Related papers: Variable Threshold MOSFET Approach (Through Dynami…

High linear voltage references circuitry are designed and implemented in TSMC 0.18$\mu$m CMOS technology. Previous research has proposed the use of MOS transistors operating in the weak inversion region to replace the bipolar devices in…

In this paper, a general circuit scheme for noise-tolerant logic design based on Markov Random Field theory and differential Cascade Voltage Switch technique has been proposed, which is an extension of the work in [1-3], [4]. A block with…

Ambipolar dual-gate transistors based on two-dimensional (2D) materials, such as graphene, carbon nanotubes, black phosphorus, and certain transition metal dichalcogenides (TMDs), enable reconfigurable logic circuits with suppressed…

This work introduces a fully tunable, ultra-low power unipolar memory cell inspired by the Schmitt-trigger comparator and designed in CMOS using only nine transistors. The proposed circuit operates entirely in the current domain and…

Steep transistors are crucial in lowering power consumption of the integrated circuits. However, the difficulties in achieving steepness beyond the Boltzmann limit experimentally have hindered the fundamental challenges in application of…

This paper proposes a method to completely hide the functionality of a digital standard cell. This is accomplished by a differential threshold logic gate (TLG). A TLG with $n$ inputs implements a subset of Boolean functions of $n$ variables…

We propose and numerically simulate novel reconfigurable logic gates employing spin metal-oxide-semiconductor field-effect transistors (spin MOSFETs). The output characteristics of the spin MOSFETs depend on the relative magnetization…

The effect of decreasing Drain-Induced Barrier Lowering (DIBL) is one of the non-desirable short-channel effects in the MOSFETs family, which causes the threshold voltage of the transistor to be reduced by increasing the voltage of the…

The Toffoli gate is a fundamental building block for quantum arithmetic and reversible logic, yet its efficient realization remains a major challenge in both near-term and fault-tolerant quantum architectures. Recent advances in dynamic…

In the today's era, reversible logics are the promising technology for the designing of low power digital logic system having major application in the field of nanotechnology, quantum computation, DNA and other low power digital circuits.…

This paper describes a novel design of a threshold logic gate (a binary perceptron) and its implementation as a standard cell. This new cell structure, referred to as flash threshold logic (FTL), uses floating gate (flash) transistors to…

Scaling up quantum computing hardware is hindered by the narrow operating margins of current quantum components. Here, we introduce a composite qubit and gate scheme that achieves wide margins by use of transistor-like nonlinearities to…

Flux-tunable qubits are a useful resource for superconducting quantum processors. They can be used to perform cPhase gates, facilitate fast reset protocols, avoid qubit-frequency collisions in large processors, and enable certain fast…

In this paper, we propose a new Extended-p+ Stepped Gate (ESG) thin film SOI LDMOS with an extended-p+ region beneath the source and a stepped gate structure in the drift region of the LDMOS. The hole current generated due to impact…

Phase change memory (PCM) is an emerging high speed, high density, high endurance, and scalable non-volatile memory technology which utilizes the large resistivity contrast between the amorphous and crystalline phases of chalcogenide…

Reversible logic is experience renewed interest as we are approach the limits of CMOS technologies. While physical implementations of reversible gates have yet to materialize, it is safe to assume that they will rely on faulty individual…

Recent reports on machine learning (ML) and machine vision (MV) devices have demonstrated the potentials of 2D materials and devices. Yet, scalable 2D devices are being challenged by contact resistance and Fermi Level Pinning (FLP), power…

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer,…

This paper enumerates new architecture of low power dual-edge triggered Flip-Flop (DETFF) designed at 180nm CMOS technology. In DETFF same data throughput can be achieved with half of the clock frequency as compared to single edge triggered…

Entangling operations are among the most important primitive gates employed in quantum computing and it is crucial to ensure high-fidelity implementations as systems are scaled up. We experimentally realize and characterize a simple scheme…