Decting Errors in Reversible Circuits With Invariant Relationships
Hardware Architecture
2008-12-22 v1
Abstract
Reversible logic is experience renewed interest as we are approach the limits of CMOS technologies. While physical implementations of reversible gates have yet to materialize, it is safe to assume that they will rely on faulty individual components. In this work we present a present a method to provide fault tolerance to a reversible circuit based on invariant relationships.
Cite
@article{arxiv.0812.3871,
title = {Decting Errors in Reversible Circuits With Invariant Relationships},
author = {Nuno Alves},
journal= {arXiv preprint arXiv:0812.3871},
year = {2008}
}