Thickness engineered tunneling field-effect transistors (TE-TFET) as a high performance ultra-scaled steep transistor is proposed. This device exploits a specific property of 2D materials: layer thickness dependent energy bandgap (Eg). Unlike the conventional hetero-junction TFETs, TE-TFET uses spatially varying layer thickness to form a hetero-junction. This offers advantages by avoiding the interface states and lattice mismatch problems. Furthermore, it boosts the ON-current to 1280μA/μm for 15nm channel length. TE-TFET shows a channel length scalability down to 9nm with constant field scaling E=VDD/Lch=30V/nm. Providing a higher ON current, phosphorene TE-TFET outperforms the homojunction phosphorene TFET and the TMD TFET in terms of extrinsic energy-delay product. In this work, the operation principles of TE-TFET and its performance sensitivity to the design parameters are investigated by the means of full-band atomistic quantum transport simulation.
@article{arxiv.1607.04065,
title = {Thickness Engineered Tunnel Field-Effect Transistors based on Phosphorene},
author = {Fan W. Chen and Hesameddin Ilatikhameneh and Tarek A. Ameen and Gerhard Klimeck and Rajib Rahman},
journal= {arXiv preprint arXiv:1607.04065},
year = {2017}
}