Back and double gate IGZO nFETs have been demonstrated down to 120nm and 70nm respectively leveraging 300mm fab processing. While the passivation of oxygen vacancies in IGZO is challenging with an integration of front side gate, a scaled back gated flow has been optimized by multiplying design of experiments around contacts and material engineering. We then successfully demonstrated sub-40mV σ(VTH_ON) in scaled IGZO nFETs. Regarding the performance and the VTH_ON control, a new IGZO phase is also reported. A model of dopants location is proposed to better explain the experimental results reported in literature.
@article{arxiv.2411.16299,
title = {Sub-40mV Sigma-VTH IGZO nFETs in 300mm Fab},
author = {Jerome Mitard and Luka Kljucar and Nouredine Rassoul and Harold Dekkers and Michiel van Setten and Adrian Vaisman Chasin and Geoffrey Pourtois and Attilio Belmonte and Gabriele Luca Donadio and Ludovic Goux and Ming Mao and Harinarayanan Puliyalil and Lieve Teugels and Diana Tsvetanova and Manoj Nag and Soeren Steudel and Jose Ignacio del Agua Borniquel and Jothilingam Ramalingam and Romain Delhougne and Chris J. Wilson and Zsolt Tokei and Gouri Sankar Kar},
journal= {arXiv preprint arXiv:2411.16299},
year = {2024}
}