Related papers: Sub-40mV Sigma-VTH IGZO nFETs in 300mm Fab

While we demonstrate a back-gated (BG) amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) transistors with a nearly ideal subthreshold slope (SS) ~ 60 mV/dec. However, SS degrades when a top-gated (TG) configuration is implemented. The energy…

The first inversion-mode gate-all-around (GAA) III-V MOSFETs are experimentally demonstrated with a high mobility In0.53Ga0.47As channel and atomic-layer-deposited (ALD) Al2O3/WN gate stacks by a top-down approach. A well-controlled InGaAs…

Field-plated (FP) depletion-mode MOVPE-grown $\beta$-Ga$_2$O$_3$ lateral MESFETs are realized with superior reverse breakdown voltages and ON currents. A sandwiched SiN$_x$ dielectric field plate design was utilized that prevents…

An analysis of recent experimental data for high-performance In0.7Ga0.3As high electron mobility transistors (HEMTs) is presented. Using a fully quantum mechanical, ballistic model, we simulate In0.7Ga0.3As HEMTs with gate lengths of LG =…

We demonstrate an optimized fabrication process for electric field (voltage gate) controlled nano-constriction spin Hall nano-oscillators (SHNOs), achieving feature sizes of <30 nm with easy to handle ma-N 2401 e-beam lithography negative…

Capacitance-Voltage (C-V) & Ballistic Current- Voltage (I-V) characteristics of Double Gate (DG) Silicon-on- Insulator (SOI) Flexible FETs having sub 35nm dimensions are obtained by self-consistent method using coupled Schrodinger- Poisson…

We report on the demonstration of a deep sub-micron normally-off AlGaN/GaN HEMT with high on-current and high threshold voltage (VTH). The high-performance device was realized by utilizing a gate recess with length and depth of 200 nm and…

An InAlN/GaN HEMT device was studied using extensive temperature dependent DC IV measurements and CV measurements. Barrier traps in the InAlN layer were characterized using transient analysis. Forward gate current was modelled using…

We report Beta-AlGaO/Ga2O3 tri-gate heterostructure MOSHEMTs incorporating a thin 5 nm Al2O3 gate oxide layer for improved gate control and reduced leakage. The devices were fabricated on AlGaO/GaO heterostructures grown by ozone MBE on…

The paper presents simulation study of thin ferroelectrics (Si doped HfO2, PZT) PGP FDSOI NCFETs at circuit level for high performance, low VDD low-power digital circuits. The baseline PGP FDSOI MOSFET has 20 nm metal gate length with…

Nano-membrane tri-gate beta-gallium oxide (\b{eta}-Ga2O3) field-effect transistors (FETs) on SiO2/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized…

The doped silicon regions (tubs) in PWFDSOI MOSFET cause significant reduction in OFF current by reducing the number of carriers contributing to the OFF current. The emphasis of the simulation and device physics study on PWFDSOI MOSFET…

Using recently available GaN FETs, a 600 Volt three-stage, multi-FET switch has been developed having 2 nanosecond rise time driving a 200 Ohm load with the potential of approaching 30 MHz average switching rates. Possible applications…

We report record performance for black phosphorus p-MOSFETs. The devices have locally patterned back gates and 20-nm-thick HfO2 gate dielectrics. Devices with effective gate length, Leff = 1.0 um display extrinsic transconductance, gm, of…

Steep-slope $\beta$-Ga$_2$O$_3$ nano-membrane negative capacitance field-effect transistors (NC-FETs) are demonstrated with ferroelectric hafnium zirconium oxide in gate dielectric stack. Subthreshold slope less than 60 mV/dec at room…

In this letter we discuss how the short channel behavior in sub 100 nm channel range can be improved by inducing a step surface potential profile at the back gate of an asymmetrical double gate (DG) Silicon-On-Insulator (SOI)…

Scaling of GaN high-electron-mobility transistors (HEMTs) usually increases gate leakage current and deteriorates breakdown characteristic, limiting the maximum drain current and output power density. These bottlenecks can be circumvented…

This letter reports high-performance $\mathrm{\beta} Ga2O3 thin channel MOSFETs with T-gate and degenerately doped source/drain contacts regrown by MOCVD. Gate length scaling (LG= 160-200 nm) leads to a peak drain current (ID,MAX) of 285…

This letter reports high performance beta-(AlxGa1-x)2O3/Ga2O3 Heterostructure FET (HFET) with improved regrowth process. Highly scaled I shaped gate have been fabricated with degenerately doped (N++) source/drain contact regrown by ozone…

Narrow-channel accumulated body nMOSFET devices with p-type side-gates surrounding the active area have been electrically characterized between 100 and 400 K with varied side-gate biasing (Vside). The subthreshold slope (SS) and drain…