SOT-MRAM 300mm integration for low power and ultrafast embedded memories

K. Garello; F. Yasin; S. Couet; L. Souriau; J. Swerts; S. Rao; S. Van Beek; W. Kim; E. Liu; S. Kundu; D. Tsvetanova; N. Jossart; K. Croes; E. Grimaldi; M. Baumgartner; D. Crotti; A. Furnémont; P. Gambardella; G. S. Kar

doi:10.1109/VLSIC.2018.8502269

SOT-MRAM 300mm integration for low power and ultrafast embedded memories

Mesoscale and Nanoscale Physics 2019-01-29 v1 Emerging Technologies Applied Physics

Authors: K. Garello , F. Yasin , S. Couet , L. Souriau , J. Swerts , S. Rao , S. Van Beek , W. Kim , E. Liu , S. Kundu , D. Tsvetanova , N. Jossart , K. Croes , E. Grimaldi , M. Baumgartner , D. Crotti , A. Furnémont , P. Gambardella , G. S. Kar

View on arXiv ↗ PDF ↗ DOI ↗

Abstract

We demonstrate for the first time full-scale integration of top-pinned perpendicular MTJ on 300 mm wafer using CMOS-compatible processes for spin-orbit torque (SOT)-MRAM architectures. We show that 62 nm devices with a W-based SOT underlayer have very large endurance (> 5x10^10), sub-ns switching time of 210 ps, and operate with power as low as 300 pJ.

Keywords

sot-mram 300 mm integration perpendicular mtj spin-orbit torque embedded memory low power

Cite

@article{arxiv.1810.10356,
  title  = {SOT-MRAM 300mm integration for low power and ultrafast embedded memories},
  author = {K. Garello and F. Yasin and S. Couet and L. Souriau and J. Swerts and S. Rao and S. Van Beek and W. Kim and E. Liu and S. Kundu and D. Tsvetanova and N. Jossart and K. Croes and E. Grimaldi and M. Baumgartner and D. Crotti and A. Furnémont and P. Gambardella and G. S. Kar},
  journal= {arXiv preprint arXiv:1810.10356},
  year   = {2019}
}

Comments

presented at VLSI2018 session C8-2

SOT-MRAM 300mm integration for low power and ultrafast embedded memories

Abstract

Keywords

Cite

Comments

Related papers