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An Event-Driven Spiking Compute-In-Memory Macro based on SOT-MRAM

Hardware Architecture 2025-11-10 v2

Abstract

The application of Magnetic Random-Access Memory (MRAM) in computing-in-memory (CIM) has gained significant attention. However, existing designs often suffer from high energy consumption due to their reliance on complex analog circuits for computation. In this work, we present a Spin-Orbit- Torque MRAM(SOT-MRAM)-based CIM macro that employs an event-driven spiking processing for high energy efficiency. The SOT-MRAM crossbar adopts a hybrid series-parallel cell structure to efficiently support matrix-vector multiplication (MVM). Signal information is (en) decoded as spikes using lightweight circuits, eliminating the need for conventional area- and powerintensive analog circuits. The SOT-MRAM macro is designed and evaluated in 28nm technology, and experimental results show that it achieves a peak energy efficiency of 243.6 TOPS/W, significantly outperforming existing designs.

Keywords

Cite

@article{arxiv.2511.03203,
  title  = {An Event-Driven Spiking Compute-In-Memory Macro based on SOT-MRAM},
  author = {Deyang Yu and Chenchen Liu and Chuanjie Zhang and Xiao Fang and Weisheng Zhao},
  journal= {arXiv preprint arXiv:2511.03203},
  year   = {2025}
}
R2 v1 2026-07-01T07:22:25.105Z