A gate voltage application in a Si-based spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) modulates spin accumulation voltages, where both electrical conductivity and drift velocity are modified while keeping constant electric current. An unprecedented reduction in the spin accumulation voltages in a Si spin MOSFET under negative gate voltage applications is observed in a high electric bias current regime. To support our claim, the electric bias current dependence of the spin accumulation voltage under the gate voltage applications is investigated in detail and compared to a spin drift diffusion model including the conductance mismatch effect. We proved that the drastic decrease of the mobility and spin lifetime in the Si channel is due to the optical phonon emission at the high electric bias current, which consequently reduced the spin accumulation voltage.
@article{arxiv.1910.13072,
title = {Investigation of gating effect in Si spin MOSFET},
author = {Soobeom Lee and Fabien Rortais and Ryo Ohshima and Yuichiro Ando and Minori Goto and Shinji Miwa and Yoshishige Suzuki and Hayato Koike and Masashi Shiraishi},
journal= {arXiv preprint arXiv:1910.13072},
year = {2020}
}