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Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class for such accelerators are so-called processor arrays, which typically integrate a two-dimensional mesh of…

硬件体系结构 · 计算机科学 2025-02-28 Dominik Walter , Marita Halm , Daniel Seidel , Indrayudh Ghosh , Christian Heidorn , Frank Hannig , Jürgen Teich

While coarse-grained reconfigurable arrays (CGRAs) have emerged as promising programmable accelerator architectures, pipelining applications running on CGRAs is required to ensure high maximum clock frequencies. Current CGRA compilers…

硬件体系结构 · 计算机科学 2022-11-24 Jackson Melchert , Yuchen Mei , Kalhan Koul , Qiaoyi Liu , Mark Horowitz , Priyanka Raina

This paper proposes an application mapping algorithm, BandMap, for coarse-grained reconfigurable array (CGRA), which allocates the bandwidth in PE array according to the transferring demands of data, especially the data with high spatial…

分布式、并行与集群计算 · 计算机科学 2023-10-11 Xiaobing Ni , Jiaheng Ruan , Mengke Ge , Wendi Sun , Song Chen , Yi Kang

Coarse-Grained Reconfigurable Arrays (CGRA) are promising edge accelerators due to the outstanding balance in flexibility, performance, and energy efficiency. Classic CGRAs statically map compute operations onto the processing elements (PE)…

硬件体系结构 · 计算机科学 2023-09-20 Dan Wu , Peng Chen , Thilini Kaushalya Bandara , Zhaoying Li , Tulika Mitra

Deep Convolutional Neural Networks (CNNs) have achieved state-of-the-art performance in a wide range of applications. However, deeper CNN models, which are usually computation consuming, are widely required for complex Artificial…

系统与控制 · 电气工程与系统科学 2020-01-08 Chaoyang Zhu , Kejie Huang , Shuyuan Yang , Ziqi Zhu , Hejia Zhang , Haibin Shen

Emerging low-powered architectures like Coarse-Grain Reconfigurable Arrays (CGRAs) are becoming more common. Often included as co-processors, they are used to accelerate compute-intensive workloads like loops. The speedup obtained is…

硬件体系结构 · 计算机科学 2025-12-03 Cristian Tirelli , Laura Pozzi

The well known method C-Slow Retiming (CSR) can be used to automatically convert a given CPU into a multithreaded CPU with independent threads. These CPUs are then called streaming or barrel processors. System Hyper Pipelining (SHP) adds a…

硬件体系结构 · 计算机科学 2015-08-31 Tobias Strauch

Coarse-Grained Reconfigurable Arrays (CGRAs) are specialized accelerators commonly employed to boost performance in workloads with iterative structures. Existing research typically focuses on compiler or architecture optimizations aimed at…

硬件体系结构 · 计算机科学 2025-08-28 Xiangfeng Liu , Zhe Jiang , Anzhen Zhu , Xiaomeng Han , Mingsong Lyu , Qingxu Deng , Nan Guan

Coarse Grained Reconfigurable Arrays (CGRAs) present both high flexibility and efficiency, making them well-suited for the acceleration of intensive workloads. Nevertheless, a key barrier towards their widespread adoption is posed by CGRA…

软件工程 · 计算机科学 2025-09-22 Yuxuan Wang , Cristian Tirelli , Giovanni Ansaloni , Laura Pozzi , David Atienza

Coarse-grain reconfigurable architectures (CGRAs) are gaining traction thanks to their performance and power efficiency. Utilizing CGRAs to accelerate the execution of tight loops holds great potential for achieving significant overall…

硬件体系结构 · 计算机科学 2024-05-28 Elad Hadar , Yoav Etsion

With the ever-growing popularity of Artificial Intelligence, there is an increasing demand for more performant and efficient underlying hardware. Convolutional Neural Networks (CNN) are a workload of particular importance, which achieve…

硬件体系结构 · 计算机科学 2023-07-18 Alexander Montgomerie-Corcoran , Zhewen Yu , Jianyi Cheng , Christos-Savvas Bouganis

The architecture of a coarse-grained reconfigurable array (CGRA) interconnect has a significant effect on not only the flexibility of the resulting accelerator, but also its power, performance, and area. Design decisions that have complex…

硬件体系结构 · 计算机科学 2022-12-01 Jackson Melchert , Keyi Zhang , Yuchen Mei , Mark Horowitz , Christopher Torng , Priyanka Raina

Spectral-domain CNNs have been shown to be more efficient than traditional spatial CNNs in terms of reducing computation complexity. However they come with a `kernel explosion' problem that, even after compression (pruning), imposes a high…

硬件体系结构 · 计算机科学 2023-10-18 Yue Niu , Rajgopal Kannan , Ajitesh Srivastava , Viktor Prasanna

To accelerate deep CNN models, this paper proposes a novel spatially adaptive framework that can dynamically generate pixel-wise sparsity according to the input image. The sparse scheme is pixel-wise refined, regional adaptive under a…

计算机视觉与模式识别 · 计算机科学 2021-03-23 Chen Tang , Wenyu Sun , Zhuqing Yuan , Yongpan Liu

Stencils represent a class of computational patterns where an output grid point depends on a fixed shape of neighboring points in an input grid. Stencil computations are prevalent in scientific applications engaging a significant portion of…

分布式、并行与集群计算 · 计算机科学 2021-03-24 Jesmin Jahan Tithi , Fabrizio Petrini , Hongbo Rong , Andrei Valentin , Carl Ebeling

Coarse-Grain Reconfigurable Arrays (CGRAs) provide flexibility and energy efficiency in accelerating compute-intensive loops. Existing compilation techniques often struggle with scalability, unable to map code onto large CGRAs. To address…

硬件体系结构 · 计算机科学 2025-12-03 Cristian Tirelli , Rodrigo Otoni , Laura Pozzi

Large-scale deep convolutional neural networks (CNNs) are widely used in machine learning applications. While CNNs involve huge complexity, VLSI (ASIC and FPGA) chips that deliver high-density integration of computational resources are…

机器学习 · 计算机科学 2017-03-23 Xushen Han , Dajiang Zhou , Shihao Wang , Shinji Kimura

Coarse-grained reconfigurable arrays (CGRAs) have attracted growing interest because they exhibit performance and energy efficiency competitive with ASICs while maintaining flexibility similar to FPGAs. These properties make CGRAs…

硬件体系结构 · 计算机科学 2026-03-03 Sabrina Yarzada , Christopher Torng

Inference of standard convolutional neural networks (CNNs) on FPGAs often incurs high latency and a long initiation interval due to the deep nested loops required to densely convolve every input pixel regardless of its feature value.…

硬件体系结构 · 计算机科学 2025-12-16 Ho Fung Tsoi , Dylan Rankin , Vladimir Loncar , Philip Harris

Coarse-Grained Reconfigurable Arrays (CGRAs) enable ease of programmability and result in low development costs. They enable the ease of use specifically in reconfigurable computing applications. The smaller cost of compilation and reduced…

硬件体系结构 · 计算机科学 2017-05-05 Amit Kulkarni , Dirk Stroobandt , Andre Werner , Florian Fricke , Michael Huebner
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