中文
相关论文

相关论文: Formal Verification of Linear Temporal Logic Speci…

200 篇论文

This paper addresses a fundamental challenge in data-driven reachability analysis: accurately representing and propagating non-convex reachable sets. We propose a novel approach using constrained polynomial zonotopes to describe reachable…

系统与控制 · 电气工程与系统科学 2025-12-23 Zhen Zhang , M. Umar B. Niazi , Michelle S. Chong , Karl H. Johansson , Amr Alanwar

Fault Tree Analysis (FTA) is a dependability analysis technique that has been widely used to predict reliability, availability and safety of many complex engineering systems. Traditionally, these FTA-based analyses are done using…

计算机科学中的逻辑 · 计算机科学 2015-05-12 Waqar Ahmed , Osman Hasan

Automatic synthesis from temporal logic specifications is an attractive alternative to manual system design, due to its ability to generate correct-by-construction implementations from high-level specifications. Due to the high complexity…

计算机科学中的逻辑 · 计算机科学 2023-01-25 Philippe Heim , Rayna Dimitrova

Reinforcement learning (RL) depends critically on the choice of reward functions used to capture the de- sired behavior and constraints of a robot. Usually, these are handcrafted by a expert designer and represent heuristics for relatively…

人工智能 · 计算机科学 2017-03-03 Xiao Li , Cristian-Ioan Vasile , Calin Belta

Computation Tree Logic (CTL) and its extensions CTL* and CTL+ are widely used in automated verification as a basis for common model checking tools. But while they can express many properties of interest like reachability, even simple…

计算机科学中的逻辑 · 计算机科学 2019-10-28 Jens Oliver Gutsfeld , Markus Müller-Olm , Christian Dielitz

We consider an extension of linear-time temporal logic (LTL) with both local and remote data constraints interpreted over a concrete domain. This extension is a natural extension of constraint LTL and the Temporal Logic of Repeating Values,…

计算机科学中的逻辑 · 计算机科学 2022-06-06 Ashwin Bhaskar

This paper presents a transformational approach for model checking two important classes of metric temporal logic (MTL) properties, namely, bounded response and minimum separation, for nonhierarchical object-oriented Real-Time Maude…

计算机科学中的逻辑 · 计算机科学 2010-09-23 Daniela Lepri , Peter Csaba Ölveczky , Erika Ábrahám

In this paper, we investigate the problem of synthesizing strategies for linear temporal logic (LTL) specifications that are interpreted over finite traces -- a problem that is central to the automated construction of controllers, robot…

计算机科学中的逻辑 · 计算机科学 2018-09-03 Alberto Camacho , Meghyn Bienvenu , Sheila A. McIlraith

This paper investigates a hybrid compositional approach to optimal mission planning for multi-rotor Unmanned Aerial Vehicles (UAVs). We consider a time critical search and rescue scenario with two quadrotors in a constrained environment.…

机器人学 · 计算机科学 2019-09-20 Usman A. Fiaz , John S. Baras

We study the verification problem for closed-loop dynamical systems with neural-network controllers (NNCS). This problem is commonly reduced to computing the set of reachable states. When considering dynamical systems and neural networks in…

系统与控制 · 电气工程与系统科学 2022-07-07 Christian Schilling , Marcelo Forets , Sebastian Guadalupe

This paper introduces ZETA, a new MATLAB library for Zonotope-based EsTimation and fAult diagnosis of discrete-time systems. It features user-friendly implementations of set representations based on zonotopes, namely zonotopes, constrained…

系统与控制 · 电气工程与系统科学 2025-04-10 Brenner S. Rego , Joseph K. Scott , Davide M. Raimondo , Marco H. Terra , Guilherme V. Raffo

In this paper we present a novel rule-based approach for Runtime Verification of FLTL properties over finite but expanding traces. Our system exploits Horn clauses in implication form and relies on a forward chaining-based monitoring…

计算机科学中的逻辑 · 计算机科学 2014-12-04 Alan Perotti , Guido Boella , Artur d'Avila Garcez

The fundamental idea of this work is to synthesize reactive controllers such that closed-loop execution trajectories of the system satisfy desired specifications that ensure correct system behaviors, while optimizing a desired performance…

系统与控制 · 计算机科学 2016-03-09 Sayan Saha , A. Agung Julius

This paper considers the problem of set-based state estimation for linear time-invariant (LTI) systems under time-varying sensor attacks. Provided that the LTI system is stable and observable via every single sensor and that at least one…

系统与控制 · 电气工程与系统科学 2022-11-17 Muhammad Umar B. Niazi , Amr Alanwar , Michelle S. Chong , Karl Henrik Johansson

Machine learning models for geotechnical hazard prediction can achieve high accuracy while learning physically inconsistent relationships from sparse or biased training data. Current remedies (post-hoc explainability, such as SHAP and LIME,…

机器学习 · 计算机科学 2026-03-19 Krishna Kumar

We propose a novel framework for ontology-based access to temporal log data using a datalog extension datalogMTL of a Horn fragment of the metric temporal logic MTL. We show that datalogMTL is ExpSpace-complete even with punctual intervals,…

计算机科学中的逻辑 · 计算机科学 2018-08-17 Sebastian Brandt , Elem Güzel Kalaycı , Vladislav Ryzhikov , Guohui Xiao , Michael Zakharyaschev

In this work we formulate the problem of satisfying a linear temporal logic formula on a linear plant with output feedback, through a recent hybrid systems formalism. We relate this problem to the notion of recurrence introduced for the…

系统与控制 · 电气工程与系统科学 2020-11-17 Andrea Bisoffi , Dimos V. Dimarogonas

We introduce a technique for synthesis of control and communication strategies for a team of agents from a global task specification given as a Linear Temporal Logic (LTL) formula over a set of properties that can be satisfied by the…

机器人学 · 计算机科学 2011-11-10 Yushan Chen , Xu Chu Ding , Calin Belta

Metric Temporal Logic (MTL) is a prominent specification formalism for real-time systems. In this paper, we show that the satisfiability problem for MTL over finite timed words is decidable, with non-primitive recursive complexity. We also…

计算机科学中的逻辑 · 计算机科学 2017-01-11 Joel Ouaknine , James Worrell

Formal property verification (FPV) has existed for decades and has been shown to be effective at finding intricate RTL bugs. However, formal properties, such as those written as SystemVerilog Assertions (SVA), are time-consuming and…

硬件体系结构 · 计算机科学 2024-10-28 Marcelo Orenes-Vera , Margaret Martonosi , David Wentzlaff
‹ 上一页 1 8 9 10 下一页 ›