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In cache-based side channel attacks, an attacker infers information about the victim based on the presence, or lack thereof, of one or more cachelines. Determining a cacheline's presence, which we refer to as "reading the signal", typically…

密码学与安全 · 计算机科学 2023-03-02 David A. Kaplan

This work considers the smart repeater network where a single source $s$ wants to send two independent packet streams to destinations $\{d_1,d_2\}$ with the help of relay $r$. The transmission from $s$ or $r$ is modeled by packet erasure…

信息论 · 计算机科学 2016-05-05 Jaemin Han , Chih-Chun Wang

The performance of multi-turn, agentic LLM inference is increasingly dominated by KV-Cache storage I/O rather than computation. In prevalent disaggregated architectures, loading the massive KV-Cache from external storage creates a…

分布式、并行与集群计算 · 计算机科学 2026-02-27 Yongtong Wu , Shaoyuan Chen , Yinmin Zhong , Rilin Huang , Yixuan Tan , Wentao Zhang , Liyue Zhang , Shangyan Zhou , Yuxuan Liu , Shunfeng Zhou , Mingxing Zhang , Xin Jin , Panpan Huang

In this paper, we aim to minimize the average file transmission delay via bandwidth allocation and cache placement in two-tier heterogeneous networks with limited storage capacity, which consists of cache capacity and buffer capacity. For…

信息论 · 计算机科学 2019-07-19 Zhaohui Yang , Cunhua Pan , Yijin Pan , Yongpeng Wu , Wei Xu , Mohammad Shikh-Bahaei , Ming Chen

Two-tier femtocell networks-- comprising a conventional macrocellular network plus embedded femtocell hotspots-- offer an economically viable solution to achieving high cellular user capacity and improved coverage. With universal frequency…

网络与互联网体系结构 · 计算机科学 2009-02-06 Vikram Chandrasekhar , Jeffrey G. Andrews

High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) has recently emerged as a suitable solution to address this…

硬件体系结构 · 计算机科学 2023-09-06 Jie Chen , Igor Loi , Eric Flamand , Giuseppe Tagliavini , Luca Benini , Davide Rossi

Transient execution attacks utilize micro-architectural covert channels to leak secrets that should not have been accessible during logical program execution. Commonly used micro-architectural covert channels are those that leave lasting…

密码学与安全 · 计算机科学 2020-06-24 Jacob Fustos , Michael Bechtel , Heechul Yun

Recent years have seen a surge in the number of data leaks despite aggressive information-containment measures deployed by cloud providers. When attackers acquire sensitive data in a secure cloud environment, covert communication channels…

密码学与安全 · 计算机科学 2020-08-05 Dmitrii Ustiugov , Plamen Petrov , M. R. Siavash Katebzadeh , Boris Grot

As cache-based side-channel attacks become serious security problems, various defenses have been proposed and deployed in both software and hardware. Consequently, cache-based side-channel attacks on processes co-residing on the same core…

密码学与安全 · 计算机科学 2022-11-14 Wei Song , Rui Hou , Peng Liu , Xiaoxin Li , Peinan Li , Lutan Zhao , Xiaofei Fu , Yifei Sun , Dan Meng

Edge caching and computing have been regarded as an efficient approach to tackle the wireless spectrum crunch problem. In this paper, we design a general coded caching with device computing strategy for content computation, e.g., virtual…

信息论 · 计算机科学 2020-02-17 Yingjiao Li , Zhiyong Chen , Meixia Tao

The QUIC protocol is a new approach to combine encryption and transport layer stream abstraction into one protocol to lower latency and improve security. However, the decision to encrypt transport layer functionality may limit the…

密码学与安全 · 计算机科学 2021-07-14 Konrad Yuri Gbur , Florian Tschorsch

On-chip communication infrastructure is a central component of modern systems-on-chip (SoCs), and it continues to gain importance as the number of cores, the heterogeneity of components, and the on-chip and off-chip bandwidth continue to…

硬件体系结构 · 计算机科学 2021-11-12 Andreas Kurth , Wolfgang Rönninger , Thomas Benz , Matheus Cavalcante , Fabian Schuiki , Florian Zaruba , Luca Benini

Recent studies highlighting the vulnerability of computer architecture to information leakage attacks have been a cause of significant concern. Among the various classes of microarchitectural attacks, cache timing channels are especially…

密码学与安全 · 计算机科学 2019-02-14 Fan Yao , Hongyu Fang , Milos Doroslovacki , Guru Venkataramani

Modern processors use branch prediction and speculative execution to maximize performance. For example, if the destination of a branch depends on a memory value that is in the process of being read, CPUs will try guess the destination and…

In the context of coded caching in the $K$-user BC, our work reveals the surprising fact that having multiple ($L$) transmitting antennas, dramatically ameliorates the long-standing subpacketization bottleneck of coded caching by reducing…

信息论 · 计算机科学 2018-02-12 Eleftherios Lampiris , Petros Elia

Memory bandwidth is known to be a performance bottleneck for FPGA accelerators, especially when they deal with large multi-dimensional data-sets. A large body of work focuses on reducing of off-chip transfers, but few authors try to improve…

硬件体系结构 · 计算机科学 2024-01-23 Corentin Ferry , Nicolas Derumigny , Steven Derrien , Sanjay Rajopadhye

Last-level cache side-channel attacks have been mostly demonstrated in highly-controlled, quiescent local environments. Hence, it is unclear whether such attacks are feasible in a production cloud environment. In the cloud, side channels…

密码学与安全 · 计算机科学 2024-05-22 Zirui Neil Zhao , Adam Morrison , Christopher W. Fletcher , Josep Torrellas

Recently, edge caching and multicasting arise as two promising technologies to support high-data-rate and low-latency delivery in wireless communication networks. In this paper, we design three transmission schemes aiming to minimize the…

信息论 · 计算机科学 2019-03-18 Shiwen He , Ju Ren , Jiaheng Wang , Yongming Huang , Yaoxue Zhang , Weihua Zhuang , Sherman , Shen

Carrier Aggregation (CA) is one of the Long Term Evolution Advanced (LTE-A) features that allow mobile network operators (MNO) to combine multiple component carriers (CCs) across the available spectrum to create a wider bandwidth channel…

网络与互联网体系结构 · 计算机科学 2017-11-08 Liston Kiwoli , Anael Sam , Emmanuel Manasseh

The continual increase of cores on server-grade CPUs raises demands on memory systems, which are constrained by limited off-chip pin and data transfer rate scalability. As a result, high-end processors typically feature lower memory…

硬件体系结构 · 计算机科学 2025-11-18 Divya Kiran Kadiyala , Alexandros Daglis