相关论文: Automatic Conversion from Flip-flop to 3-phase Lat…
Machine learning-based compact models provide a rapid and efficient approach for estimating device behavior across multiple input parameter variations. In this study, we introduce two reverse-design algorithms that utilize these compact…
In this paper, we present a new walking controller based on 3LP model. Taking advantage of linear equations and closed-form solutions of 3LP, the proposed controller can project the state of the robot at any time during the phase back to a…
Scan-based Design-for-Testability (DFT) measures are prevalent in modern digital integrated circuits to achieve high test quality at low hardware cost. With the advent of 3D heterogeneous integration and chiplet-based systems, the role of…
The subject of this paper is the optimal design of a parallel mechanism intended for three-axis machining applications. Parallel mechanisms are interesting alternative designs in this context but most of them are designed for three- or…
High-rate quantum LDPC (qLDPC) codes reduce memory overhead by densely packing many logical qubits into a single block of physical qubits. Here we extend this concept to high-rate computation by constructing \emph{batched} fault-tolerant…
Early scheduling algorithms usually adjusted the clock cycle duration to the execution time of the slowest operation. This resulted in large slack times wasted in those cycles executing faster operations. To reduce the wasted times…
We show that given a desired closed-loop response for a system, there exists an affine subspace of controllers that achieve this response. By leveraging the existence of this subspace, we are able to separate controller design from…
Designing analog circuits from performance specifications is a complex, multi-stage process encompassing topology selection, parameter inference, and layout feasibility. We introduce FALCON, a unified machine learning framework that enables…
Electrical power conversions are common in a large variety of engineering applications. With reference to AC/DC and DC/AC power conversions, a strong research interest resides in multilevel converters, thanks to the many advantages they…
Three-level Lambda systems appear in various quantum information processing platforms. In several control schemes, the excited level serves as an auxiliary state for implementing gate operations between the lower qubit states. However,…
Current-steering digital-to-analog converter (DAC) is a prominent architecture that is commonly used in high-speed applications such as optical communications. One of the shortcomings of this architecture is the output glitches that are…
Layout-dependent effects (LDEs) significantly impact analog circuit performance. Traditionally, designers have relied on symmetric placement of circuit components to mitigate variations caused by LDEs. However, due to non-linear nature of…
The 6TiSCH protocol stack plays a vital role in enabling reliable and energy-efficient communications for the Industrial Internet of Things (IIoT). However, it faces challenges, including prolonged network formation, inefficient parent…
This paper presents and implements an iterative feedback design algorithm for stabilisation of discrete-time switched systems under arbitrary switching regimes. The algorithm seeks state feedback gains so that the closed-loop switching…
In the last decades, the applications of power inverter increased rapidly. As a result, in spite of rectifier, an inverter with a high-power electronic oscillator has capability to convert direct current (DC) into alternating current (AC)…
This paper presents two novel topologies for automatically transforming power converter topology from three-phase 3-level cascaded H-bridge to three-phase 2-level converter design. These techniques are implemented by flicking specific…
Electromechanical switching devices such as relays, solenoid valves, and contactors offer several technical and economic advantages that make them widely used in industry. However, uncontrolled operations result in undesirable…
This paper proposes an algorithm for synthesis of clock-follow-data designs that provides robustness against timing violations for RSFQ circuits while maintaining high performance and minimizing area costs. Since superconducting logic gates…
With the increasing prevalence of chiplet systems in high-performance computing applications, the number of design options has increased dramatically. Instead of chips defaulting to a single die design, now there are options for 2.5D and 3D…
We introduce Attention Free Transformer (AFT), an efficient variant of Transformers that eliminates the need for dot product self attention. In an AFT layer, the key and value are first combined with a set of learned position biases, the…