相关论文: Synthesizing a Clock Signal with Reactions---Part …
Existing optical lattice clocks demonstrate a high level of performance, but they remain complex experimental devices. In order to address a wider range of applications including those requiring transportable devices, it will be necessary…
High-precision frequency alignment with classical communication channels is difficult due to noise, propagation delays, and signal degradation. Current optical methods, commonly involving frequency combs, are capable of synchronising clocks…
Controller synthesis is a theoretical approach to the systematic design of discrete event systems. It constructs a controller to provide feedback and control to the system, ensuring it meets specified control specifications. Traditional…
Reactive synthesis is a paradigm for automatically building correct-by-construction systems that interact with an unknown or adversarial environment. We study how to do reactive synthesis when part of the specification of the system is that…
In present paper, I propose a method for resolving the timing delays for output signals from an asynchronous sequential system. It will be used an example of an asynchronous sequential system that will set up an output signal when an input…
The production process of integrated electronic circuitry inherently leads to large heterogeneities on the component level. For electronic clock networks this implies detuned intrinsic frequencies and differences in coupling strength and…
This paper develops a novel control synthesis approach for a wide class of practical systems. The control action is derived by inserting a compensator device in the forward path of the system that is to be controlled. The compensator design…
Context: Several approaches to estimate frequency, phase and amplitude errors in time series analyses were reported in the literature, but they are either time consuming to compute, grossly overestimating the error, or are based on…
Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the worst case timing analysis. Because of the correlation between delays of circuit components, timing model…
In this paper, we consider multiple signals sharing same instantaneous frequencies. This kind of data is very common in scientific and engineering problems. To take advantage of this special structure, we modify our data-driven…
The synthesis of antenna arrays in presence of mutual coupling using generalized scattering matrices in terms of characteristic modes is proposed. For the synthesis, the array is built of synthetic elements that are described by their modal…
Reactive synthesis is an automated procedure to obtain a correct-by-construction reactive system from a given specification. GR(1) is a well-known fragment of linear temporal logic (LTL) where synthesis is possible using a polynomial…
Different types of synchronization states are found when non-linear chemical oscillators are embedded into an active medium that interconnects the oscillators but also contributes to the system dynamics. Using different theoretical tools,…
A quantum clock working as a control device is examined. The quality of the control process is characterized by the magnitude of deviation of perturbed state from unperturbed state of the controlled system. Uncertainty relations that relate…
We report an s-wave collisional frequency shift of an atomic clock based on fermions. In contrast to bosons, the fermion clock shift is insensitive to the population difference of the clock states, set by the first pulse area in Ramsey…
In trapped-atom clocks, the primary source of decoherence is often the phase noise of the oscillator. For this case, we derive theoretical performance gains by combining several atomic ensembles. For example, M ensembles of N atoms can be…
Clock synchronization is a widely discussed topic in the engineering literature. Ensuring that individual clocks are closely aligned is important in network systems, since the correct timing of various events in a network is usually…
This paper is concerned with the synthesis of RC electrical circuits from physics-based supercapacitor models describing conservation and diffusion relationships. The proposed synthesis procedure uses model discretisation, linearisation,…
We present a new approach for the design of a synthetic biological circuit whose behaviour is specified in terms of signal temporal logic (STL) formulae. We first show how to characterise with STL formulae the input/output behaviour of…
In this paper, we investigate the problem of synthesizing controllers for temporal logic specifications under security constraint. We assume that there exists a passive intruder (eavesdropper) that can partially observe the behavior of the…