相关论文: The PRO1 ASIC for Fast Wilkinson Encoding

The next generation of wireless communications systems will employ new frequency bands such as those in the upper midband, millimeter-wave and sub-terahertz frequency bands. The high energy consumption of analog-to-digital converters…

The oversampling technique has been shown to increase the SNR and is used in many high-performance systems such as in the ADC for audio and DAT systems. This paper presents the design of the decimation and it's VLSI implementation which is…

The Large High Altitude Air Shower Observatory is in the R&D phase, in which the Water Cherenkov Detector Array is an important part. The signals of Photo-Multiplier Tubes would vary from single photo electron to 4000 photo electrons, and…

Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower…

High resolution images are widely used in our daily life, whereas high-speed video capture is challenging due to the low frame rate of cameras working at the high resolution mode. Digging deeper, the main bottleneck lies in the low…

Analog-domain operations offer a promising solution to accelerating signal processing and enabling future multiple-input multiple-output (MIMO) communications with thousands of antennas. In Part I of this paper, we have introduced a…

In this work, we consider the acquisition of stationary signals using uniform analog-to-digital converters (ADCs), i.e., employing uniform sampling and scalar uniform quantization. We jointly optimize the pre-sampling and reconstruction…

A low-complexity all-analog circuit is proposed to perform efficiently Analog Joint Source Channel Coding (AJSCC), which can compress two or more sensor signals into one with controlled distortion while also being robust against wireless…

The MIDNA application specific integrated circuits (ASICs) are a series of skipper-CCD readout chips fabricated in a 65 nm low-power CMOS process that implement a correlated double sampling signal processing chain based on dual-slope…

Present semiconductor research is increasingly focusing on either higher speeds or higher linearity or both. Applications range from consumer, industrial, healthcare and military. Typically such circuits are fabricated in today's…

This paper presents the design, implementation, and performance evaluation of LUCAS, a low-power, ultra-low jitter ASIC optimized for SiPM readout in Time-of-Flight Computed Tomography (ToF-CT) applications. Leveraging a novel preamplifier…

Long contexts improve capabilities of large language models but pose serious hardware challenges: compute and memory footprints grow linearly with sequence length. Particularly, the decoding phase continuously accesses massive KV cache,…

Millimeter wave (mmWave) massive MIMO can achieve orders of magnitude increase in spectral and energy efficiency, and it usually exploits the hybrid analog and digital precoding to overcome the serious signal attenuation induced by mmWave…

There is a growing interest in signaling schemes that operate in the wideband regime due to the crowded frequency spectrum. However, a downside of the wideband regime is that obtaining channel state information is costly, and the capacity…

We present the first characterization results of Timespot1, an ASIC designed in CMOS 28 nm technology, featuring a $32 \times 32$ pixel matrix with a pitch of $55 ~ \mu m$. Timespot1 is the first small-size prototype, conceived to readout…

Low-resolution analog-to-digital converters (ADCs) have emerged as an efficient solution for massive multiple-input multiple-output (MIMO) systems to reap high data rates with reasonable power consumption and hardware complexity. In this…

Quantum computers are nearing the thousand qubit mark, with the current focus on scaling to improve computational performance. As quantum processors grow in complexity, new challenges arise such as the management of device variability and…

A 64-channel mixed-mode ASIC, suitable for particle detectors of large dynamic range and high capacitance up to hundreds of pF, is presented here. Each channel features an analogue front-end for signal amplification and filtering, and a…

Digital cameras consume ~0.1 microjoule per pixel to capture and encode video, resulting in a power usage of ~20W for a 4K sensor operating at 30 fps. Imagining gigapixel cameras operating at 100-1000 fps, the current processing model is…

This work presents the 8-channel FastIC+, a low-power consumption and highly configurable multi-channel front-end ASIC with internal digitization, for the readout of photo-sensors with picosecond time resolution and intrinsic gain. This…