Related papers: The Large Analog Bandwidth Recorder And Digitizer …

We report on the development and characterization of the low-noise, low power, mixed analog-digital SIRIUS ASICs for both the LAD and WFM X-ray instruments of LOFT. The ASICs we developed are reading out large area silicon drift detectors…

We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream…

This paper presents a novel data detector ASIC for massive multiuser multiple-input multiple-output (MU-MIMO) wireless systems. The ASIC implements a modified version of the large-MIMO approximate message passing algorithm (LAMA), which…

Recent clinical evidence shows a correlation between linear energy transfer (LET) and tumor control in carbon ion radiotherapy. This prompts the direct inclusion of LET into the treatment planning. Currently, LET is mainly extracted from…

Low Level RF (LLRF) control systems of linear accelerators (LINACs) are typically implemented with heterodyne based architectures, which have complex analog RF mixers for up and down conversion. The Gen 3 Radio Frequency System-on-Chip…

The upgrade of the ATLAS Liquid Argon Calorimeter readout system calls for the development of radiation tolerant, high speed and low power serializer ASIC. We have designed a phase locked loop using a commercial 0.25 um Silicon-on-Sapphire…

This paper presents a differential 10-bit 2 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) with a precision-improvement technique. The proposed method breaks the direct tradeoff between the capacitive…

Wilkinson conversion of stored samples in large Switch Capacitor Array (SCA) ASICs, such as used for high speed waveform sampling, has many benefits in terms of compactness, no missing output codes, low power requirements and robustness.…

For the High-Luminosity phase of LHC, the ATLAS experiment is proposing the addition of a High Granularity Timing Detector (HGTD) in the forward region to mitigate the effects of the increased pile-up. The chosen detection technology is Low…

We characterize a new x-ray Mixed-Mode Pixel Array Detector (MM-PAD-2.1) Application Specific Integrated Circuit (ASIC). Using an integrating pixel front-end with dynamic charge removal architecture, the MM-PAD-2.1 ASIC extends the maximum…

Silicon photo-multipliers (SiPM) have been replacing traditional photomultiplier tubes in most light sensing applications. However, when large detection surface coverage is needed, photomultipliers (PMTs) are still the preferred choice. The…

A near memory hardware accelerator, based on a novel direct path computational model, for real-time emulation of radio frequency systems is demonstrated. Our evaluation of hardware performance uses both application-specific integrated…

1 ps timing resolution is the entry point to signature based searches relying on secondary/tertiary vertices and particle identification. We describe a preliminary design for PSEC5, an 8-channel 40 GS/s waveform-sampling ASIC in the TSMC 65…

A serializer ASIC and a VCSEL driver ASIC are needed for the front-end optical data transmission in the ATLAS liquid argon calorimeter readout phase-I upgrade. The baseline ASICs are the serializer LOCx2 and the VCSEL driver LOCld, designed…

The design and performance of a multi-G-sample/s fully-synchronous analog transient waveform recorder I.C. ("SST") with fast and flexible trigger capabilities is presented. Containing 4 channels of 256 samples per channel and fabricated in…

The Advanced X-ray Imaging Satellite (AXIS) is a NASA probe class mission concept designed to deliver arcsecond resolution with an effective area ten times that of Chandra (at launch). The AXIS focal plane features an MIT Lincoln Laboratory…

We designed a versatile analog front-end chip, called LTARS, for TPC-applications, primarily targeted at dual-phase liquid Ar-TPCs for neutrino experiments and negative-ion $\mu$-TPCs for directional dark matter searches. Low-noise…

The \emph{MIDNA} application specific integrated circuit (ASIC) is a skipper-CCD readout chip fabricated in a 65 nm LP-CMOS process that is capable of working at cryogenic temperatures. The chip integrates four front-end channels that…

We present a sub-Nyquist analog-to-digital converter of wideband inputs. Our circuit realizes the recently proposed modulated wideband converter, which is a flexible platform for sampling signals according to their actual bandwidth…

We present a 22 nm FD-SOI (fully depleted silicon-on-insulator) application-specific integrated circuit (ASIC) implementation of a novel soft-output Gram-domain block coordinate descent (GBCD) data detector for massive multi-user (MU)…