Related papers: The Large Analog Bandwidth Recorder And Digitizer …
Even if Application-Specific Integrated Circuits (ASIC) have proven to be a relevant choice for integrating inference at the edge, they are often limited in terms of applicability. In this paper, we demonstrate that an ASIC neural network…
This paper presents a low-power 10-bit 130-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) in 90 nm CMOS process. The proposed asynchronous ADC consists of a comparator, SAR logic block and two control blocks…
Switched capacitor arrays (SCA) ASICs are becoming more and more popular for the readout of detector signals, since the sampling frequency of typically several gigasamples per second allows excellent pile-up rejection and time measurements.…
We present the design and test results of two optical data transmission ASICs for the High-Luminosity LHC (HL-LHC) experiments. These ASICs include a two-channel serializer (LOCs2) and a single-channel Vertical Cavity Surface Emitting Laser…
We present the first characterization results of Timespot1, an ASIC designed in CMOS 28 nm technology, featuring a $32 \times 32$ pixel matrix with a pitch of $55 ~ \mu m$. Timespot1 is the first small-size prototype, conceived to readout…
A digitally-assisted photonic analog domain self-interference cancellation (SIC) and frequency downconversion method is proposed for in-band full-duplex multiple-input multiple-output (MIMO) systems using the least square (LS) algorithm…
In the context of the Silicon tracking for a Linear Collider (SiLC) R&D collaboration, a highly compact mixed-signal chip has been designed in 130nm CMOS technology intended to read Silicon strip detectors for the experiments at the future…
Massive multiuser (MU) multiple-input multiple-output (MIMO) enables concurrent transmission of multiple users to a multi-antenna basestation (BS). To detect the users' data using linear equalization, the BS must perform preprocessing,…
This work presents a custom analog front-end card designed for the read-out of PMTs coupled to lanthanum bromide scintillators. It integrates 16 discrete analog constant fraction discriminators (CFDs) on a compact 12x10 cm board, providing…
High resolution analog to digital converters (ADCs) are conventionally used at the receiver terminals to store an accurate digital representation of the received signal, thereby allowing for reliable decoding of transmitted messages.…
The emerging memristor crossbar array based computing circuits exhibit computing speeds and energy efficiency far surpassing those of traditional digital processors. This type of circuits can complete high-dimensional matrix operations in…
An X-ray detector will be presented that is the combination of a segmented ionization chamber featuring one-dimensional spatial resolution integrated with an intelligent ADC front-end, multi DSP processing and embedded PC platform. This…
We present two prototypes of a gigabit transceiver ASIC, GBCR1 and GBCR2, both designed in a 65-nm CMOS technology for the ATLAS Inner Tracker Pixel Detector readout upgrade. The first prototype, GBCR1, has four upstream receiver channels…
The MIDNA application specific integrated circuits (ASICs) are a series of skipper-CCD readout chips fabricated in a 65 nm low-power CMOS process that implement a correlated double sampling signal processing chain based on dual-slope…
Integrated sensing and communications (ISAC) has emerged as a means to efficiently utilize spectrum and thereby save cost and power. At the higher end of the spectrum, ISAC systems operate at wideband using large antenna arrays to meet the…
A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is…
Integrated sensing and communication (ISAC) has emerged as a pivotal technology for next-generation wireless communication and radar systems, enabling high-resolution sensing and high-throughput communication with shared spectrum and…
This work presents the 8-channel FastIC+, a low-power consumption and highly configurable multi-channel front-end ASIC with internal digitization, for the readout of photo-sensors with picosecond time resolution and intrinsic gain. This…
A front end ASIC has been designed to equip the {\mu}TPC prototype developed for the MIMAC project, which requires 3D reconstruction of low energy particle tracks in order to perform directional detection of galactic Dark Matter. Each ASIC…
Low-resolution digital-to-analog and analog-to-digital converters (DACs and ADCs) have attracted considerable attention in efforts to reduce power consumption in millimeter wave (mmWave) and massive MIMO systems. This paper presents an…