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Designing field-programmable gate array (FPGA)-based accelerators for modern artificial intelligence workloads requires navigating a large and complex hardware design space encompassing architectural parameters, dataflow strategies, and…

Hardware Architecture · Computer Science 2026-05-08 Vinamra Sharma , Xingjian Fu , Jude Haris , José Cano

Large Language Models (LLMs) are becoming increasingly data-intensive due to growing model sizes, and they are becoming memory-bound as the context length and, consequently, the key-value (KV) cache size increase. Inference, particularly…

Hardware Architecture · Computer Science 2025-11-18 Khyati Kiyawat , Zhenxing Fan , Yasas Seneviratne , Morteza Baradaran , Akhil Shekar , Zihan Xia , Mingu Kang , Kevin Skadron

Over the last few years, Large Language Models (LLMs) have emerged as a valuable tool for Electronic Design Automation (EDA). State-of-the-art research in LLM-aided design has demonstrated the ability of LLMs to generate syntactically…

Hardware Architecture · Computer Science 2025-07-10 Elisavet Lydia Alvanaki , Kevin Lee , Luca P. Carloni

Transformers, while revolutionary, face challenges due to their demanding computational cost and large data movement. To address this, we propose HyFlexPIM, a novel mixed-signal processing-in-memory (PIM) accelerator for inference that…

Hardware Architecture · Computer Science 2025-06-03 Chang Eun Song , Priyansh Bhatnagar , Zihan Xia , Nam Sung Kim , Tajana Rosing , Mingu Kang

Edge intelligence delivers low-latency inference, yet most edge analytics remain hard-coded and must be redeployed as conditions change. When data patterns shift or new questions arise, engineers often need to write new scripts and push…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-14 Chinmaya Kumar Dehury , Siddharth Singh Kushwaha , Qiyang Zhang , Alaa Saleh , Praveen Kumar Donta

Advances in hybrid bonding and packaging have driven growing interest in 3D DRAM-stacked accelerators with higher memory bandwidth and capacity. As LLMs scale to hundreds of billions or trillions of parameters, distributed inference across…

The current state of the art of Simultaneous Localisation and Mapping, or SLAM, on low power embedded systems is about sparse localisation and mapping with low resolution results in the name of efficiency. Meanwhile, research in this field…

Robotics · Computer Science 2019-02-14 Konstantinos Boikos , Christos-Savvas Bouganis

The growing adoption of domain-specific architectures in edge computing platforms for deep learning has highlighted the efficiency of hardware accelerators. However, integrating custom accelerators into modern machine learning (ML)…

Machine Learning · Computer Science 2025-07-08 Samira Ahmadifarsani , Daniel Mueller-Gritschneder , Ulf Schlichtmann

The exponential growth of artificial intelligence (AI) applications has exposed the inefficiency of conventional von Neumann architectures, where frequent data transfers between compute units and memory create significant energy and latency…

Hardware Architecture · Computer Science 2026-03-18 James Read , Ming-Yen Lee , Wei-Hsing Huang , Yuan-Chun Luo , Anni Lu , Shimeng Yu

Long Short-Term Memory (LSTM) neural networks have penetrated healthcare applications where real-time requirements and edge computing capabilities are essential. Gait analysis that detects abnormal steps to prevent patients from falling is…

Hardware Architecture · Computer Science 2026-04-16 Mohammad Hasan Ahmadilivani , Levent Aksoy , Mohammad Eslami , Jaan Raik , Alar Kuusik

Large language model (LLM) pruning with fixed N:M structured sparsity significantly limits the expressivity of the sparse model, yielding sub-optimal performance. In contrast, supporting multiple N:M patterns to provide sparse…

Machine Learning · Computer Science 2025-04-22 Akshat Ramachandran , Souvik Kundu , Arnab Raha , Shamik Kundu , Deepak K. Mathaikutty , Tushar Krishna

With the rise of Embodied Foundation Models (EFMs), most notably Small Language Models (SLMs), adapting Transformers for edge applications has become a very active field of research. However, achieving end-to-end deployment of SLMs on…

Machine Learning · Computer Science 2024-08-09 Moritz Scherer , Luka Macan , Victor Jung , Philip Wiese , Luca Bompani , Alessio Burrello , Francesco Conti , Luca Benini

Digital Computing-in-Memory (DCIM) is an innovative technology that integrates multiply-accumulation (MAC) logic directly into memory arrays to enhance the performance of modern AI computing. However, the need for customized memory cells…

The use of deep learning has grown at an exponential rate, giving rise to numerous specialized hardware and software systems for deep learning. Because the design space of deep learning software stacks and hardware accelerators is diverse…

Machine Learning · Computer Science 2020-10-06 Zhan Shi , Chirag Sakhuja , Milad Hashemi , Kevin Swersky , Calvin Lin

This work presents E-ReCON, a 16 Kb energy and resource-efficient digital compute-in-memory (DCIM) macro based on a compact 3T1R ReRAM bitcell for edge-AI inference. The proposed bitcell occupies only 0.85 um^2 and supports reliable…

Neural and Evolutionary Computing · Computer Science 2026-05-21 Ankit Kumar Tenwar , Mukul Lokhande , Santosh Kumar Vishvakarma

GPU design space exploration (DSE) for modern AI workloads, such as Large-Language Model (LLM) inference, is challenging because of GPUs' vast, multi-modal design spaces, high simulation costs, and complex design optimization objectives…

Hardware Architecture · Computer Science 2026-03-19 Tao Zhang , Rui Ma , Shuotao Xu , Yongqiang Xiong , Peng Cheng

The utilization of large-scale neural networks on Processing-In-Memory (PIM) accelerators encounters challenges due to constrained on-chip memory capacity. To tackle this issue, current works explore model compression algorithms to reduce…

Hardware Architecture · Computer Science 2024-04-18 Chenyu Wang , Zhen Dong , Daquan Zhou , Zhenhua Zhu , Yu Wang , Jiashi Feng , Kurt Keutzer

Computing-in-memory (CIM) is an emerging computing paradigm, offering noteworthy potential for accelerating neural networks with high parallelism, low latency, and energy efficiency compared to conventional von Neumann architectures.…

Neural and Evolutionary Computing · Computer Science 2024-09-30 Kam Chi Loong , Shihao Han , Sishuo Liu , Ning Lin , Zhongrui Wang

This paper investigates the effectiveness of small language models (SLMs) for agentic tasks (function/tool/API calling) with a focus on running agents on edge devices without reliance on cloud infrastructure. We evaluate SLMs using the…

Machine Learning · Computer Science 2025-12-01 Mohd Ariful Haque , Fahad Rahman , Kishor Datta Gupta , Khalil Shujaee , Roy George

Spatial dataflow accelerators are a promising direction for next-generation computer systems because they can reduce the memory bottlenecks of traditional von Neumann machines such as CPUs and GPUs. They organize computation around…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-13 Wei Li , Zhenyu Bai , Heru Wang , Pranav Dangi , Zhiqiang Zhang , Cheng Tan , Huiying Lan , Weng-Fai Wong , Tulika Mitra