Related papers: A manufacturable surface code architecture for spi…
Scalable quantum computation demands high-fidelity two-qubit gates. However, decoherence and control errors are inevitable, which can decrease the quality of implemented quantum operations. We propose a robust iSWAP gate protocol for…
Current implementations of quantum computers suffer from large numbers of control lines per qubit, becoming unmanageable with system scale up. Here, we discuss a sparse spin-qubit architecture featuring integrated control electronics…
Quantum computation requires many qubits that can be coherently controlled and coupled to each other. Qubits that are defined using lithographic techniques are often argued to be promising platforms for scalability, since they can be…
We present a scalable scheme for executing the error-correction cycle of a monolithic surface-code fabric composed of fast-flux-tuneable transmon qubits with nearest-neighbor coupling. An eight-qubit unit cell forms the basis for repeating…
Quantum algorithm design usually assumes access to a perfect quantum computer with ideal properties like full connectivity, noise-freedom and arbitrarily long coherence time. In Noisy Intermediate-Scale Quantum (NISQ) devices, however, the…
Silicon spin qubits are a promising candidate for quantum computing, thanks to their high coherence, high controllability and manufacturability. However, the most scalable complementary metal-oxide-semiconductor (CMOS) based implementations…
Silicon-based quantum-computer architectures have attracted attention because of their promise for scalability and their potential for synergetically utilizing the available resources associated with the existing Si technology…
Quantum logic gates are the key elements in quantum computing. Here we investigate the possibility of achieving a scalable and compact quantum computing based on stationary electron-spin qubits, by using the giant optical circular…
Silicon spin qubits stand out due to their very long coherence times, compatibility with industrial fabrication, and prospect to integrate classical control electronics. To achieve a truly scalable architecture, a coherent mid-range link…
Mobile spin qubit architectures promise flexible connectivity for efficient quantum error correction and relaxed device layout constraints, but their viability rests on preserving spin coherence during transport. While shuttling transforms…
We demonstrate a 12 quantum dot device fabricated on an undoped Si/SiGe heterostructure as a proof-of-concept for a scalable, linear gate architecture for semiconductor quantum dots. The device consists of 9 quantum dots in a linear array…
Fault-tolerant quantum operation is a key requirement for the development of quantum computing. This has been realized in various solid-state systems including isotopically purified silicon which provides a nuclear spin free environment for…
We demonstrate a robust quantum control framework that enables high-fidelity gate operations in semiconductor spin qubit systems with always-on couplings. Always-on interactions between qubits pose a fundamental challenge for quantum…
Silicon spin qubits are promising candidates for building scalable quantum computers due to their nanometre scale features. However, delivering microwave control signals locally to each qubit poses a challenge and instead methods that…
Rapid development in quantum computing leads to the appearance of several quantum applications. Quantum Fourier Transformation (QFT) sits at the heart of many of these applications. Existing work leverages SAT solver or heuristics to…
Spin qubits based on semiconductor quantum dots are a promising prospect for quantum computation because of their high coherence times and gate fidelities. However, scaling up those structures to the numbers required by fault-tolerant…
In silicon quantum computers, a single electron is trapped in a microstructure called a quantum dot, and its spin is used as a qubit. For large-scale integration of qubits, we previously proposed an approach of arranging the quantum dots in…
We describe a concrete device roadmap towards a fault-tolerant quantum computing architecture based on noise-resilient, topologically protected Majorana-based qubits. Our roadmap encompasses four generations of devices: a single-qubit…
High-fidelity control of quantum bits is paramount for the reliable execution of quantum algorithms and for achieving fault-tolerance, the ability to correct errors faster than they occur. The central requirement for fault-tolerance is…
Quantum low-density parity-check (qLDPC) codes offer a promising route to scalable fault-tolerant quantum computing due to their substantially reduced footprint. However, these gains can be diluted at utility scale if we cannot also realize…