Related papers: A manufacturable surface code architecture for spi…

Given a quantum gate circuit, how does one execute it in a fault-tolerant architecture with as little overhead as possible? In this paper, we discuss strategies for surface-code quantum computing on small, intermediate and large scales.…

Universal quantum computers require fault-tolerant logical qudits, as qudits naturally align with the simulation of multi-level physical systems. Here, we present a general framework and working examples for encoding fault-tolerant logical…

In this work, we explore and propose several quantum circuit mapping strategies to optimize qubit shuttling in scalable quantum computing architectures based on silicon spin qubits. Our goal is to minimize phase errors introduced during…

Of the many potential hardware platforms, superconducting quantum circuits have become the leading contender for constructing a scalable quantum computing system. All current architecture designs necessitate a 2D arrangement of…

Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has…

Many quantum computing platforms are based on a two-dimensional physical layout. Here we explore a concept called looped pipelines which permits one to obtain many of the advantages of a 3D lattice while operating a strictly 2D device. The…

Motivated by the prospect of a two-dimensional square-lattice geometry for semiconductor spin qubits, we explore the realization of the Parity Architecture with quantum dots (QDs). We present sequences of spin shuttling and quantum gates…

Fast and high fidelity shuttling of spin qubits has been demonstrated in semiconductor quantum dot devices. Several architectures based on shuttling have been proposed; it has been suggested that singlet-triplet (dual-spin) qubits could be…

We propose a scheme for scalable and robust quantum computing on two-dimensional arrays of qubits with fixed longitudinal coupling. This opens the possibility for bypassing the device complexity associated with tunable couplers required in…

In this paper, we formally describe the three challenges of mapping surface code on superconducting devices, and present a comprehensive synthesis framework to overcome these challenges. The proposed framework consists of three…

A design for a large-scale surface code quantum processor based on a node/network approach is introduced for semiconductor quantum dot spin qubits. The minimal node contains only 7 quantum dots, and nodes are separated on the micron scale,…

Fault-tolerant quantum computers which can solve hard problems rely on quantum error correction. One of the most promising error correction codes is the surface code, which requires universal gate fidelities exceeding the error correction…

Proposed silicon-based quantum-computer architectures have attracted attention because of their promise for scalability and their potential for synergetically utilizing the available resources associated with the existing Si technology…

Single-spin qubits in semiconductor quantum dots proposed by Loss and DiVincenzo (LD qubits) hold promise for universal quantum computation with demonstrations of a high single-qubit gate fidelity above 99.9 % and two-qubit gates in…

Spins based in silicon provide one of the most promising architectures for quantum computing. A scalable design for silicon-germanium quantum dot qubits is presented. The design incorporates vertical and lateral tunneling. Simulations of a…

Coherent links between qubits separated by tens of micrometers are expected to facilitate scalable quantum computing architectures for spin qubits in electrically-defined quantum dots. These links create space for classical on-chip control…

One of the key compilation steps in Quantum Computing (QC) is to determine an initial logical to physical mapping of the qubits used in a quantum circuit. The impact of the starting qubit layout can vastly affect later scheduling and…

In semiconductor spin quantum bits (qubits), the radio-frequency (RF) gate-based readout is a promising solution for future large-scale integration, as it allows for a fast, frequency-multiplexed readout architecture, enabling multiple…

Topological quantum error correction is a milestone in the scaling roadmap of quantum computers, which targets circuits with trillions of gates that would allow running quantum algorithms for real-world problems. The square-lattice surface…

Creating a quantum-coherent architecture at the atomic scale has long been an ambition in quantum science and nanotechnology. This ultimate length scale requires the use of fundamental quantum properties of atoms, such as the spin of…