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Implantable Brain-Computer Interfaces (iBCIs) are increasingly pivotal in clinical and daily applications. However, wireless iBCIs face severe constraints in power consumption and data throughput. To mitigate these bottlenecks, we propose a…
In view of the High Luminosity LHC, the current CMS tracking detector will have to be replaced during Long Shutdown 3 to cope with the higher radiation environment and to withstand an increased data rate. To prepare for the so-called CMS…
High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) has recently emerged as a suitable solution to address this…
The ALICE Central Trigger Processor (CTP) is going to be upgraded for LHC Run 3 with completely new hardware and a new Trigger and Timing Control (TTC-PON) system based on a Passive Optical Network (PON) system. The new trigger system has…
The high instantaneous luminosities expected following the upgrade of the Large Hadron Collider (LHC) to the High Luminosity LHC (HL-LHC) pose major experimental challenges for the CMS experiment. A central component to allow efficient…
The upgrades of the Belle experiment and the KEKB accelerator aim to increase the data set of the experiment by the factor 50. This will be achieved by increasing the luminosity of the accelerator which requires a significant upgrade of the…
The rapid growth of Internet-of-things (IoT) and artificial intelligence applications have called forth a new computing paradigm--edge computing. In this paper, we study the suitability of deploying FPGAs for edge computing from the…
(Abridged version) The CMS experiment at the LHC will begin operation in 2007. The CMS Tracker sub-detector, comprises ~10 million detector channels read out by ~40 000 analog optical links. The optoelectronic components have been designed…
Cost-effective embedded systems necessitate utilizing the single-wire communication protocol for inter-chip communication, thanks to its reduced pin count in comparison to the multi-wire I2C or SPI protocols. However, current single-wire…
This article discusses the basic system architecture for terahertz (THz) wireless links with bandwidths of more than 50 GHz into optical networks. New design principles and breakthrough technologies are required in order to demonstrate Tbps…
Throughout the last decade, the Advanced Telecommunications Computing Architecture (ATCA) solidified its position as one of the main switched-based crate standards for advanced Physics instrumentation, offering not only highly performant…
The ITkPixV2 chip is the final production readout chip for the ATLAS Phase 2 Inner Tracker (ITk) upgrade at the upcoming High-Luminosity LHC (HL-LHC). Due to the extraordinarily high peak luminosity at the HL-LHC of $5 \times 10^{34}$…
A new downstream tracking system, known as the Mighty Tracker, is planned to be installed at LHCb during LS4 of the LHC. This will allow an increase in instantaneous luminosity from $2\cdot10^{33}~\mathrm{cm}^{-2}\mathrm{s}^{-1}$ to…
The Phase-2 ATLAS upgrade for the High Luminosity Large Hadron Collider (HL-LHC) has motivated progressive redesigns of the ATLAS Tile Calorimeter (TileCal) read-out link and control board (Daughterboard). The Daughterboard (DB)…
The TRB hardware module is a multi-purpose Trigger and Readout Board with on-board DAQ functionality developed for the upgrade of the HADES experiment. It contains a single computer chip (Etrax) running Linux as a well as a 100 Mbit/s…
Finding tracks downstream of the magnet at the earliest LHCb trigger level is not part of the baseline plan of the upgrade trigger, on account of the significant CPU time required to execute the search. Many long-lived particles, such as…
The LHCb collaboration has redesigned its trigger to enable the full offline detector reconstruction to be performed in real time. Together with the real-time alignment and calibration of the detector, and a software infrastructure to make…
The development of CMOS pixel sensors with column parallel read-out and integrated zero-suppression has resulted in a full size, nearly 1 Megapixel, prototype with ~100 \mu s read-out time. Its performances are quite close to the ILD vertex…
The photon detection system for the LHCb RICH Upgrade consists of an array of multianode photomultiplier tubes (MaPMTs) read out by custom-built modular electronics. The behaviour of the whole chain was studied at CERN using a pulsed laser.…
In the new era of HL-LHC experiments, fast-timing detectors are emerging as critical tools for background rejection. Typical requirements include a temporal hit resolution of about 50 ps, a spatial resolution of around 12 $\mu$m, and…