Related papers: Development of a timing chip prototype in 110 nm C…

Hybrid pixel detectors have been invented for the LHC to make tracking and vertexing possible at all in LHC's radiation intense environment. The LHC pixel detectors have meanwhile very successfully fulfilled their promises and R\&D for the…

The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) to start operation in 2026. The most severe challenges are to be faced by the innermost layers of the pixel…

Pixel sensors using 8" CMOS processing technology have been designed and characterized offering the benefits of industrial sensor fabrication, including large wafers, high throughput and yield, as well as low cost. The pixel sensors are…

A MHz frame rate X-ray area detector (LPD - Large Pixel Detector) is under development by the Rutherford Appleton Laboratory for the European XFEL. The detector will have 1 million pixels and allows analogue storage of 512 images taken at…

The CMS pixel detector consists of approximately 66 million silicon pixels whose analog signals are read out by 15,840 programmable Readout Chips. With the recent startup of the LHC, the detector is now collecting data used for precise…

To cope with the challenging environment of the planned high luminosity upgrade of the Large Hadron Collider (HL-LHC), scheduled to start operation in 2029, CMS will replace its entire tracking system. The requirements for the tracker are…

This contribution investigates a prototype of a TPC readout with a highly pixelated CMOS ASIC, which is an option for charged particles tracking of the ILC. A triple GEM stack was joined with a TimePix and MediPix2 chip (pixel size of…

The calibration process for the hybrid array pixel detector designed for High Energy Photon Source in China, we called HEPS-BPIX, is presented in this paper. Based on the threshold scanning, the relationship between energy and threshold is…

We present the first physical realization of in-pixel signal processing with integrated AI-based data filtering for particle tracking detectors. Building on prior work that demonstrated a physics-motivated edge-AI algorithm suitable for…

For the ATLAS Pixel Detector fast readout electronics has been successfully developed and tested. Main attention was given to the ability to detect small charges in the order of 5,000 electrons within 25 ns in the harsh radiation…

Silicon pixel sensors manufactured using commercial CMOS processes are promising instruments for high-energy particle physics experiments due to their high yield and proven radiation hardness. As one of the essential factors for the…

We present the test results of a low jitter Phase Locked Loop (PLL) prototype chip for the CMS Endcap Timing Layer readout chip (ETROC). This chip is based on the improved version of a clock synthesis circuit named ljCDR from the Low-Power…

CMOS sensors were successfully implemented in the STAR tracker [1]. LHC experiments have shown that efficient b tagging, reconstruction of displaced vertices and identification of disappearing tracks are necessary. An improved vertex…

We present the first prototype of a novel thermal neutron detector using the time projection method. The system consists of 8 TimePix ASICS with postprocessed InGrid meshes. Each ASIC has 256 x 256 pixels of 55 mum x 55mum in size with the…

A 33.6 ps LSB Time-to-Digital converter was designed in 130 nm BiCMOS technology. The core of the converter is a differential 9-stage ring oscillator, based on a multi-path architecture. A novel version of this design is proposed, along…

We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the first prototype, triple modular redundancy has been…

The upgrades of ATLAS and CMS for the High Luminosity LHC (HL-LHC) highlighted physics objects timing as a tool to resolve primary interactions within a bunch crossing. Since the expected pile-up is around 200, with an r.m.s. time spread of…

A high-resolution time-to-digital converter (TDC) based on wave union (four-edge WU A), dual-sampling, and sub-TDL methods is proposed and implemented in a 16-nm Xilinx UltraScale+ field-programmable gate array (FPGA). We combine WU and…

In view of the high luminosity phase of the LHC (HL-LHC) to start operation around 2026, a major upgrade of the tracker system for the ATLAS experiment is in preparation. The expected neutron equivalent fluence of up to 2.4 * 1e16 1 MeV…

The analog front-end for the Low Gain Avalanche Detector (LGAD) based precision timing application in the CMS Endcap Timing Layer (ETL) has been prototyped in a 65 nm CMOS mini-ASIC named ETROC0. Serving as the very first prototype of ETL…