Related papers: Topological Metal MoP Nanowire for Interconnect
The resistance bottleneck in metal-interconnect scaling calls for new interconnect materials. This paper explores topological semimetals as a potential solution. After reviewing the desirable properties of topological semimetals for…
The sharp increase in resistivity of copper interconnects at ultra-scaled dimensions threatens the continued miniaturization of integrated circuits. Topological semimetals (TSMs) with gapless surface states (Fermi arcs) provide conduction…
The poor performance of copper interconnects at the nanometer scale calls for new material solutions for continued scaling of integrated circuits. We propose the use of three dimensional time-reversal-invariant topological insulators (TIs),…
The challenge of increasing copper (Cu) resistivity with diminishing Cu interconnect dimensions in complementary metal-oxide-semiconductor (CMOS) transistors, along with the imperative for efficient electron transport paths to fulfill…
Continued scaling into the sub 7 nm regime exacerbates quantum limited resistivity in Cu interconnects. We evaluated layered PdCoO2 and explicitly benchmarked it against Cu to identify mechanisms that maintain conductivity under…
Interconnect resistance and reliability have emerged as critical factors limiting the performance of advanced CMOS circuits. With the slowdown of transistor scaling, interconnect scaling has become the primary driver of continued circuit…
The industrial standard copper (Cu) interconnects face a substantial resistivity increase at thinner linewidths, posing a well-known challenge to limit overall device performance. To address this issue, we have evaluated the potential…
The strong non-linear increase in Cu interconnect line resistance with a decrease in linewidth presents a significant obstacle to their continued downscaling. In this letter we use first principles density functional theory based electronic…
Nontrivial band topologies in semimetals lead to robust surface states that can contribute dominantly to the total conduction. This may result in reduced resistivity with decreasing feature size contrary to conventional metals, which may…
Protected surface states arising from non-trivial bandstructure topology in semimetals can potentially enable new device functionalities in compute, memory, interconnect, sensing, and communication. This necessitates a fundamental…
Copper interconnects in modern integrated circuits require ultra-thin barriers to prevent intermixing of Cu with surrounding dielectric materials. Conventional barriers rely on metals like TaN, however their finite thickness reduces the…
As interconnect dimensions continue to shrink, the industry-standard copper faces a critical increase in resistivity, presenting a significant hurdle to overall device performance. To overcome this limitation, this work investigates the…
The classification of materials into insulators and conductors has been shaken up by the discovery of topological insulators that conduct robustly at the edge but not in the bulk. In mechanics, designating a material as insulating or…
Understanding the interfacial electrical properties between metallic electrodes and low dimensional semiconductors is essential for both fundamental science and practical applications. Here we report the observation of thickness reduction…
Resistivity augmentation in nanoscale metal interconnects is a performance limiting factor in integrated circuits. Here we present calculations of electron scattering and transmission at the interface between Cu interconnects and their…
Networks of nanowires and nanosheets are important for many applications in printed electronics. However, the network conductivity and mobility are usually limited by the inter-particle junction resistance, a property that is challenging to…
Copper nanowires are widely used as on-chip interconnects due to superior conductivity. However, with aggressive Cu interconnect scaling, the diffusive surface scattering of electrons drastically increases the electrical resistivity. In…
We assess the viability of topological semimetals for application in advanced interconnect technology, where conductor size is on the order of a few nanometers and grain boundaries are expected to be prevalent. We investigate the electron…
Graphene nanoribbon interconnects are fabricated, and the extracted resistivity is compared to that of Cu. It is found that the average resistivity at a given line-width (18nm<W<52nm) is about 3X that of a Cu wire, whereas the best GNR has…
As silicon transistors scale toward future technology nodes, three-dimensional architectures -- including gate-all-around (GAA) nanoribbon and complementary field-effect transistors (CFETs) -- require channel widths in the tens of…