Related papers: A radiation tolerant clock generator for the CMS E…

We present design and construction of a large low-mass Triple-GEM detector prototype for forward tracking at a future Electron-Ion Collider. In this environment, multiple scattering of forward and backward tracks must be minimized so that…

We present a compact FPGA-based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 TTL channels with a timing…

In this paper, we implement a low-latency rapid-prototyping platform for signal processing based on software-defined radios (SDRs) and off-the-shelf PC hardware. This platform allows to evaluate a wide variety of algorithms in real-time…

High-voltage CMOS (HV-CMOS) pixel technology is being considered for future Higgs factory experiments. The ATLASPix3.1 chip, with a pitch of 50$\mu m$ x 150$\mu m$, fabricated using TSI 180nm HV-CMOS technology, is a full reticle-size…

This paper presents the design and characterisation of a front-end prototype ASIC for the ATLAS High Granularity Timing Detector, which is planned for the High-Luminosity phase of the LHC. This prototype, called ALTIROC1, consists of a…

After the Long Shutdown 2 the LHC will provide lead-lead collisions at interaction rates as high as 50kz. In order to cope with such conditions the ALICE Time Projection Chamber (TPC) needs to be upgraded. After the upgrade the TPC will run…

This paper propose a decoder architecture for low-density parity-check convolutional code (LDPCCC). Specifically, the LDPCCC is derived from a quasi-cyclic (QC) LDPC block code. By making use of the quasi-cyclic structure, the proposed…

This paper presents the experimental results of $17~MeV$ proton irradiation on a $60~GHz$ low power, half-duplex transceiver (TRX) chip implemented in $65~nm$ CMOS technology. It supports short range point-to-point data rate up to $6~Gbps$…

This work presents the 8-channel FastIC+, a low-power consumption and highly configurable multi-channel front-end ASIC with internal digitization, for the readout of photo-sensors with picosecond time resolution and intrinsic gain. This…

The readout electronics of the ATLAS Hadronic Endcap Calorimeter (HEC) will have to withstand an about 3-5 times larger radiation environment at the future high-luminosity LHC (HLLHC) compared to their design values. The preamplifier and…

This contribution investigates a prototype of a TPC readout with a highly pixelated CMOS ASIC, which is an option for charged particles tracking of the ILC. A triple GEM stack was joined with a TimePix and MediPix2 chip (pixel size of…

We present an evaluation of a novel on-chip charge detector, called the Single electron Sensitive Read Out (SiSeRO), for charge-coupled device (CCD) image sensor applications. It uses a p-MOSFET transistor at the output stage with a…

Semi-definite relaxation (SDR) detector has been demonstrated to be successful in approaching maximum likelihood (ML) performance while the time complexity is only polynomial. We propose a new receiver jointly utilizing the forward error…

The prototype of time digitizing system for the upgrade of BESIII endcap TOF (ETOF) is introduced in this paper. The ETOF readout electronics has a formation of distributed architecture that hit signal from multi-gap resistive plate chamber…

Power dissipation in the sequential systems of modern CPU integrated chips (CPU-IC viz., Silicon Chip) is in discussion since the last decade. Researchers have been cultivating many low power design methods to choose the best potential…

Time-domain reflectometry (TDR) is an established means of measuring impedance inhomogeneity of a variety of waveguides, providing critical data necessary to characterize and optimize the performance of high-bandwidth computational and…

Most atomic physics experiments are controlled by a digital pattern generator used to synchronize all equipment by providing triggers and clocks. Recently, the availability of well-documented open-source development tools has lifted the…

For the High-Luminosity phase of LHC, the ATLAS experiment is proposing the addition of a High Granularity Timing Detector (HGTD) in the forward region to mitigate the effects of the increased pile-up. The chosen detection technology is Low…

The performance of the CMS electromagnetic calorimeter upgraded readout electronics, developed for the High-Luminosity phase of the LHC, is discussed. Data collected in two beam test campaigns conducted in 2018 and 2021 at the H4 and H2…

In this work, we develop a new iterative turbo receiver for LDPC-coded multi-antenna systems based on semidefinite relaxation (SDR). For a classical turbo receiver, forward error correction (FEC) code is only used at decoder. Nonetheless,…