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Reactive systems that operate in environments with complex data, such as mobile apps or embedded controllers with many sensors, are difficult to synthesize. Synthesis tools usually fail for such systems because the state space resulting…

Logic in Computer Science · Computer Science 2019-05-09 Bernd Finkbeiner , Felix Klein , Ruzica Piskac , Mark Santolucito

The synthesis of reactive systems from linear temporal logic (LTL) specifications is an important aspect in the design of reliable software and hardware. We present our adaption of the classic automata-theoretic approach to LTL synthesis,…

Logic in Computer Science · Computer Science 2020-02-21 Michael Luttenberger , Philipp J. Meyer , Salomon Sickert

In this paper we introduce a class of Linear Temporal Logic (LTL) specifications for which the problem of synthesizing controllers can be solved in polynomial time. The new class of specifications is an LTL fragment that we term Mode-Target…

Optimization and Control · Mathematics 2016-12-20 Ayca Balkan , Moshe Vardi , Paulo Tabuada

We address the problem of diagnosing and repairing specifications for hybrid systems formalized in signal temporal logic (STL). Our focus is on the setting of automatic synthesis of controllers in a model predictive control (MPC) framework.…

Temporal synthesis is the automated design of a system that interacts with an environment, using the declarative specification of the system's behavior. A popular language for providing such a specification is Linear Temporal Logic, or LTL.…

Logic in Computer Science · Computer Science 2020-08-18 Shufang Zhu , Lucas M. Tabajara , Jianwen Li , Geguang Pu , Moshe Y. Vardi

Automatic synthesis from temporal logic specifications is an attractive alternative to manual system design, due to its ability to generate correct-by-construction implementations from high-level specifications. Due to the high complexity…

Logic in Computer Science · Computer Science 2023-01-25 Philippe Heim , Rayna Dimitrova

This paper presents an algorithmic framework for control synthesis of continuous dynamical systems subject to signal temporal logic (STL) specifications. We propose a novel algorithm to obtain a time-partitioned finite automaton from an STL…

Systems and Control · Electrical Eng. & Systems 2022-10-05 Qi Heng Ho , Roland B. Ilyes , Zachary N. Sunberg , Morteza Lahijanian

We address the problem of synthesizing reactive controllers for cyber-physical systems subject to Signal Temporal Logic (STL) specifications in the presence of adversarial inputs. Given a finite horizon, we define a reactive hierarchy of…

Reactive synthesis is a key technique for the design of correct-by-construction systems and has been thoroughly investigated in the last decades. It consists in the synthesis of a controller that reacts to environment's inputs satisfying a…

Formal Languages and Automata Theory · Computer Science 2020-08-13 Alessandro Cimatti , Luca Geatti , Nicola Gigante , Angelo Montanari , Stefano Tonetta

Reactive synthesis is a technology for the automatic construction of reactive systems from logical specifications. In these lecture notes, we study different algorithms for the reactive synthesis problem of linear-time temporal logic (LTL).…

Logic in Computer Science · Computer Science 2018-03-28 Bernd Finkbeiner , Felix Klein

Autonomous agents often operate in uncertain environments where their decisions are made based on beliefs over states of targets. We are interested in controller synthesis for complex tasks defined over belief spaces. Designing such…

Systems and Control · Computer Science 2015-10-30 Chanyeol Yoo , Calin Belta

In runtime verification, manually formalizing a specification for monitoring system executions is a tedious and error-prone process. To address this issue, we consider the problem of automatically synthesizing formal specifications from…

Artificial Intelligence · Computer Science 2023-10-27 Ritam Raha , Rajarshi Roy , Nathanael Fijalkow , Daniel Neider , Guillermo A. Perez

In the timeline-based approach to planning, originally born in the space sector, the evolution over time of a set of state variables (the timelines) is governed by a set of temporal constraints. Traditional timeline-based planning systems…

Artificial Intelligence · Computer Science 2022-09-22 Renato Acampora , Luca Geatti , Nicola Gigante , Angelo Montanari , Valentino Picotti

Reactive synthesis builds a system from a specification given as a temporal logic formula. Traditionally, reactive synthesis is defined for systems with Boolean input and output variables. Recently, new theories and techniques have been…

Logic in Computer Science · Computer Science 2021-08-03 Benedikt Maderbacher , Roderick Bloem

Synthesis from linear temporal logic (LTL) specifications provides assured controllers for systems operating in stochastic and potentially adversarial environments. Automatic synthesis tools, however, require a model of the environment to…

Artificial Intelligence · Computer Science 2026-04-07 Alper Kamil Bozkurt , Yu Wang , Michael M. Zavlanos , Miroslav Pajic

In this paper, we investigate the control synthesis problem for Signal Temporal Logic (STL) specifications in the presence of uncontrollable agents. Existing works mainly address this problem in a robust control setting by assuming the…

Systems and Control · Electrical Eng. & Systems 2025-02-21 Bohan Cui , Xinyi Yu , Alessandro Giua , Xiang Yin

In the timeline-based approach to planning, the evolution over time of a set of state variables (the timelines) is governed by a set of temporal constraints. Traditional timeline-based planning systems excel at the integration of planning…

Artificial Intelligence · Computer Science 2024-09-04 Renato Acampora , Luca Geatti , Nicola Gigante , Angelo Montanari , Valentino Picotti

Formal control of cyber-physical systems allows for synthesis of control strategies from rich specifications such as temporal logics. However, the classes of systems that the formal approaches can be applied to is limited due to the…

Logic in Computer Science · Computer Science 2019-09-04 Irmak Saglam , Ebru Aydin Gol

We introduce a metric that can quantify the temporal relaxation of Signal Temporal Logic (STL) specifications and facilitate resilient control synthesis in the face of infeasibilities. The proposed metric quantifies a cumulative notion of…

Systems and Control · Electrical Eng. & Systems 2022-12-13 Ali Tevfik Buyukkocak , Derya Aksaray

This paper studies the controller synthesis problem for Linear Temporal Logic (LTL) specifications using (constrained) zonotope techniques. First, we implement (constrained) zonotope techniques to partition the state space and further to…

Systems and Control · Electrical Eng. & Systems 2021-11-16 Wei Ren , Julien Calbert , Raphael Jungers
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