English
Related papers

Related papers: Helix: Algorithm/Architecture Co-design for Accele…

200 papers

The substantial memory bandwidth and computational demands of large language models (LLMs) present critical challenges for efficient inference. To tackle this, the literature has explored heterogeneous systems that combine neural processing…

Hardware Architecture · Computer Science 2026-05-05 Yuzong Chen , Chao Fang , Xilai Dai , Yuheng Wu , Thierry Tambe , Marian Verhelst , Mohamed S. Abdelfattah

Modern HPC systems are increasingly relying on greater core counts and wider vector registers. Thus, applications need to be adapted to fully utilize these hardware capabilities. One class of applications that can benefit from this increase…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-06-16 James Vance , Zhen-Hao Xu , Nikita Tretyakov , Torsten Stuehn , Markus Rampp , Sebastian Eibl , Christoph Junghans , André Brinkmann

Database search and clustering are fundamental components of many data analytics problems, such as mass spectrometry-driven proteomics. Traditional full clustering and search algorithms suffer from high resource usage and long latencies. We…

Databases · Computer Science 2025-11-25 Md Mizanur Rahaman Nayan , Zheyu Li , Flavio Ponzina , Sumukh Pinge , Tajana Rosing , Azad J. Naeemi

Nanopore sequencers generate raw electrical signals representing the contents of a biological sequence molecule passing through the nanopore. These signals can be analyzed directly, avoiding basecalling entirely. We observe that while…

Genomics · Quantitative Biology 2024-10-24 Joël Lindegger , Can Firtina , Nika Mansouri Ghiasi , Mohammad Sadrosadati , Mohammed Alser , Onur Mutlu

In this paper, we present a novel technique to search for hardware architectures of accelerators optimized for end-to-end training of deep neural networks (DNNs). Our approach addresses both single-device and distributed pipeline and tensor…

Hardware Architecture · Computer Science 2024-04-24 Muhammad Adnan , Amar Phanishayee , Janardhan Kulkarni , Prashant J. Nair , Divya Mahajan

The wide adoption of deep neural networks has been accompanied by ever-increasing energy and performance demands due to the expensive nature of training them. Numerous special-purpose architectures have been proposed to accelerate training:…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-12-30 Aayush Ankit , Izzat El Hajj , Sai Rahul Chalamalasetti , Sapan Agarwal , Matthew Marinella , Martin Foltin , John Paul Strachan , Dejan Milojicic , Wen-mei Hwu , Kaushik Roy

De novo assembly enables investigations of unknown genomes, paving the way for personalized medicine and disease management. However, it faces immense computational challenges arising from the excessive data volumes and algorithmic…

Hardware Architecture · Computer Science 2025-05-14 Heewoo Kim , Sanjay Sri Vallabh Singapuram , Haojie Ye , Joseph Izraelevitz , Trevor Mudge , Ronald Dreslinski , Nishil Talati

Spiking Neural Networks (SNNs) have emerged as a biologically inspired alternative to conventional deep networks, offering event-driven and energy-efficient computation. However, their throughput remains constrained by the serial update of…

Neural and Evolutionary Computing · Computer Science 2026-03-16 Hongyang Shang , Shuai Dong , Yahan Yang , Junyi Yang , Peng Zhou , Arindam Basu

We accelerate reactive transport (RT) simulation by replacing the geochemical solver in the RT code by a surrogate model or emulator, considering either a trained deep neural network (DNN) or a k-nearest neighbor (kNN) regressor. We focus…

Chemical Physics · Physics 2021-12-01 Eric Laloy , Diederik Jacques

Developing kernels for Processing-In-Memory (PIM) platforms poses unique challenges in data management and parallel programming on limited processing units. Although software development kits (SDKs) for PIM, such as the UPMEM SDK, provide…

Hardware Architecture · Computer Science 2025-10-21 Krystian Chmielewski , Jarosław Ławnicki , Uladzislau Lukyanau , Tadeusz Kobus , Maciej Maciejewski

Customized hardware accelerators have been developed to provide improved performance and efficiency for DNN inference and training. However, the existing hardware accelerators may not always be suitable for handling various DNN models as…

Hardware Architecture · Computer Science 2021-04-07 Xiaofan Zhang , Hanchen Ye , Deming Chen

Developing accurate and reliable Compute-In-Memory (CIM) architectures is becoming a key research focus to accelerate Artificial Intelligence (AI) tasks on hardware, particularly Deep Neural Networks (DNNs). In that regard, there has been…

Hardware Architecture · Computer Science 2026-04-15 Omar Numan , Gaurav Singh , Kazybek Adam , Jelin Leslin , Aleksi Korsman , Otto Simola , Marko Kosunen , Jussi Ryynänen , Martin Andraud

Homomorphic encryption (HE) enables computation over encrypted data, offering strong privacy guarantees for untrusted computing environments. Practical adoption remains limited by high computational complexity, large ciphertext sizes, and…

Processing-in-memory (PIM) architectures are emerging to reduce data movement in data-intensive applications. These architectures seek to exploit the same physical devices for both information storage and logic, thereby dwarfing the…

Hardware Architecture · Computer Science 2023-05-09 Orian Leitersdorf , Ronny Ronen , Shahar Kvatinsky

With small-scale quantum processors transitioning from experimental physics labs to industrial products, these processors allow us to efficiently compute important algorithms in various fields. In this paper, we propose a quantum algorithm…

Quantum Physics · Physics 2020-05-22 Aritra Sarkar , Zaid Al-Ars , Carmen G. Almudever , Koen Bertels

Training of deep neural networks (DNNs) is a computationally intensive task and requires massive volumes of data transfer. Performing these operations with the conventional von Neumann architectures creates unmanageable time and power…

Emerging Technologies · Computer Science 2020-01-08 Murat Onen , Brenden A. Butters , Emily Toomey , Tayfun Gokmen , Karl K. Berggren

As LLMs scale to multi-million-token KV histories, real-time autoregressive decoding under tight Token-to-Token Latency (TTL) constraints faces growing pressure. Two core bottlenecks dominate: accessing Feed-Forward Network (FFN) weights…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-11 Nidhi Bhatia , Ankit More , Ritika Borkar , Tiyasa Mitra , Ramon Matas , Ritchie Zhao , Maximilian Golub , Dheevatsa Mudigere , Brian Pharris , Bita Darvish Rouhani

Neural networks are an increasingly attractive algorithm for natural language processing and pattern recognition. Deep networks with >50M parameters are made possible by modern GPU clusters operating at <50 pJ per op and more recently,…

DL inference queries play an important role in diverse internet services and a large fraction of datacenter cycles are spent on processing DL inference queries. Specifically, the matrix-matrix multiplication (GEMM) operations of…

Hardware Architecture · Computer Science 2020-12-02 Benjamin Y. Cho , Jeageun Jung , Mattan Erez

Hashmaps are widely utilized data structures in many applications to perform a probe on key-value pairs. However, their performance tends to degrade with the increase in the dataset size, which leads to expensive off-chip memory accesses to…

Hardware Architecture · Computer Science 2023-07-03 Akhil Shekar , Morteza Baradaran , Sabiha Tajdari , Kevin Skadron
‹ Prev 1 3 4 5 6 7 10 Next ›