Related papers: MOSFET Characterization and Modeling at Cryogenic …

The extremely low threshold voltage (Vth) of native MOSFETs (Vth~0V@300K) is conducive to the design of cryogenic circuits. Previous research on cryogenic MOSFETs mainly focused on the standard threshold voltage (SVT) and low threshold…

We report the design-technology co-optimization (DTCO) scheme to develop a 28-nm cryogenic CMOS (Cryo-CMOS) technology for high-performance computing (HPC). The precise adjustment of halo implants manages to compensate the threshold voltage…

Silicon carbide is a wide-bandgap semiconductor with an emerging CMOS technology platform and it is widely deployed in high power and harsh environment electronics. This material is also attracting interest for quantum technologies through…

This paper demonstrates the use of voltage noise thermometry, with a cross-correlation technique, as a dissipation-free method of thermometry inside a CMOS integrated circuit (IC). We show that this technique exhibits broad agreement with…

The control interface of a large-scale quantum computer will likely require electronic sub-systems that operate in close proximity to the qubits, at deep cryogenic temperatures. Here, we report the low-temperature performance of custom…

In the pursuit of quantum computing, solid-state quantum systems, particularly superconducting ones, have made remarkable advancements over the past two decades. However, achieving fault-tolerant quantum computing for next-generation…

Large-scale cryogenic quantum systems are constrained by an input-output bottleneck between room-temperature electronics and millikelvin stages, particularly in superconducting qubit platforms. This bottleneck is most acute for output…

We report on an industry-grade CMOS-compatible qubit fabrication approach using a CMOS pilot line, enabling a yield of functional devices reaching 92.8 %, with a resistance spread evaluated across the full wafer 200 mm diameter of 12.4 %…

Large power consumption of silicon CMOS electronics is a challenge in very-large-scale integrated circuits and a major roadblock to fault-tolerant quantum computation. Matching the power dissipation of Si-MOSFETs to the thermal budget at…

Quantum computers based on solid state qubits have been a subject of rapid development in recent years. In current Noisy Intermediate-Scale Quantum (NISQ) technology, each quantum device is controlled and characterised though a dedicated…

We make use of a custom-designed cryo-CMOS multiplexer (MUX) to enable multiple quantum devices to be characterized in a single cool-down of a dilution refrigerator. Combined with a packaging approach that integrates cryo-CMOS chips and a…

This paper presents a novel approach utilizing a scalable neural decoder application-specific integrated circuit (ASIC) based on metal oxide memristors in a 180nm CMOS technology. The ASIC architecture employs in-memory computing with…

This paper reports the first cryogenic characterization of 28nm Fully-Depleted-SOI CMOS technology. A comprehensive study of digital/analog performances and body-biasing from room to the liquid helium temperature is presented. Despite a…

A novel power-efficient analog buffer at liquid helium temperature is proposed. The proposed circuit is based on an input stage consisting of two complementary differential pairs to achieve rail-to-rail level tracking. Results of simulation…

When designing and studying circuits operating at cryogenic temperatures understanding local heating within the circuits is critical due to the temperature dependence of transistor and noise behavior. We have investigated local heating…

Current and future experiments observing the cosmic microwave background require a detailed understanding of optical performance at cryogenic temperatures. Pre-deployment analysis of optics can be performed in custom-engineered cryogenic…

This paper presents low power dissipation, low phase noise ring oscillators (ROs) based on Semiconductor Manufacturing International Corporation (SMIC) 0.18{\mu}m CMOS technology at liquid helium temperature (LHT). First, the…

In this paper a commercial 28-nm FDSOI CMOS technology is characterized and modeled from room temperature down to 4.2 K. Here we explain the influence of incomplete ionization and interface traps on this technology starting from the…

Future quantum computing systems will require cryogenic integrated circuits to control and measure millions of qubits. In this paper, we report the design and characterization of a prototype cryogenic CMOS integrated circuit that has been…

Surface temperature measurements were performed with a Scanning Thermal Microscope mounted with a thermoresistive wire probe of micrometrSurface temperature measurements were performed with a Scanning Thermal Microscope mounted with a…