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Related papers: Top-Down Transaction-Level Design with TL-Verilog

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Estimating the quality of register transfer level (RTL) designs is crucial in the electronic design automation (EDA) workflow, as it enables instant feedback on key metrics like area and delay without the need for time-consuming logic…

Machine Learning · Computer Science 2025-08-27 Yi Liu , Hongji Zhang , Yiwen Wang , Dimitris Tsaras , Lei Chen , Mingxuan Yuan , Qiang Xu

Portability of hardware designs between Programmable Logic Devices (PLD) can be accomplished through the use of device-agnostic hardware description languages (HDL) such as Verilog or VHDL. Hardware designers can use HDLs to migrate…

Hardware Architecture · Computer Science 2021-11-11 Nicholas V. Giamblanco , Andrew Schmidt

Generating synthesizable Verilog for large, hierarchical hardware designs remains a significant challenge for large language models (LLMs), which struggle to replicate the structured reasoning that human experts employ when translating…

Hardware Architecture · Computer Science 2026-04-21 Sazzadul Islam , Tasnim Tabassum , Hao Zheng

This paper aims to categorize bank transactions using weak supervision, natural language processing, and deep neural network techniques. Our approach minimizes the reliance on expensive and difficult-to-obtain manual annotations by…

Machine Learning · Computer Science 2023-06-13 Liam Toran , Cory Van Der Walt , Alan Sammarone , Alex Keller

In this paper, we consider a hierarchical distributed multi-task learning (MTL) system where distributed users wish to jointly learn different models orchestrated by a central server with the help of a layer of multiple relays. Since the…

Information Theory · Computer Science 2022-12-19 Haoyang Hu , Songze Li , Minquan Cheng , Youlong Wu

Signal Temporal Logic (STL) has emerged as an expressive language for reasoning intricate planning objectives. However, existing STL-based methods often assume full observation and known dynamics, which imposes constraints on real-world…

Robotics · Computer Science 2025-08-27 Peiran Liu , Yiting He , Yihao Qin , Hang Zhou , Yiding Ji

The ubiquity of payment networks generates vast transactional data encoding rich consumer and merchant behavioral patterns. Recent foundation models for transaction analysis process tabular data sequentially but rely on index-based…

Computation and Language · Computer Science 2026-01-12 Xiran Fan , Zhimeng Jiang , Chin-Chia Michael Yeh , Yuzhong Chen , Yingtong Dou , Menghai Pan , Yan Zheng

Transistor topology optimization is a critical step in standard cell design, directly dictating diffusion sharing efficiency and downstream routability. However, identifying optimal topologies remains a persistent bottleneck, as…

Machine Learning · Computer Science 2026-04-17 Zhan Song , Yu-Tung Liu , Chen Chen , Guoheng Sun , Jiaqi Yin , Chia-tung Ho , Ang Li , Haoxing Ren , Cunxi Yu

This thesis concerns the implementation of Lambda Prolog, a higher-order logic programming language that supports the lambda-tree syntax approach to representing and manipulating formal syntactic objects. Lambda Prolog achieves its…

Programming Languages · Computer Science 2009-11-30 Xiaochu Qi

Recent advances in large language models (LLMs) and vision-language models (VLMs) have enabled powerful autonomous agents capable of complex reasoning and multi-modal tool use. Despite their growing capabilities, today's agent frameworks…

Artificial Intelligence · Computer Science 2025-06-12 Peiran Li , Xinkai Zou , Zhuohang Wu , Ruifeng Li , Shuo Xing , Hanwen Zheng , Zhikai Hu , Yuping Wang , Haoxi Li , Qin Yuan , Yingmo Zhang , Zhengzhong Tu

In this paper, we propose Minimalist Transfer Learning (MinTL) to simplify the system design process of task-oriented dialogue systems and alleviate the over-dependency on annotated data. MinTL is a simple yet effective transfer learning…

Computation and Language · Computer Science 2020-09-29 Zhaojiang Lin , Andrea Madotto , Genta Indra Winata , Pascale Fung

Transaction Level Modeling (TLM) approach is used to meet the simulation speed as well as cycle accuracy for large scale SoC performance analysis. We implemented a transaction-level model of a proprietary bus called AHB+ which supports an…

Hardware Architecture · Computer Science 2011-11-09 Young-Taek Kim , Taehun Kim , Youngduk Kim , Chulho Shin , Eui-Young Chung , Kyu-Myung Choi , Jeong-Taek Kong , Soo-Kwan Eo

Distributed systems are critical to reliable and scalable computing; however, they are complicated in nature and prone to bugs. To modularly manage this complexity, network middleware has been traditionally built in layered stacks of…

Programming Languages · Computer Science 2020-04-06 Jeremiah Griffin , Mohsen Lesani , Narges Shadab , Xizhe Yin

Various logic-locking schemes have been proposed to protect hardware from intellectual property piracy and malicious design modifications. Since traditional locking techniques are applied on the gate-level netlist after logic synthesis,…

Cryptography and Security · Computer Science 2022-04-08 Dominik Sisejkovic , Luca Collini , Benjamin Tan , Christian Pilato , Ramesh Karri , Rainer Leupers

We propose magnetic threshold-logic (MTL) design based on non-volatile spin-torque switches. A threshold logic gate (TLG) performs summation of multiple inputs multiplied by a fixed set of weights and compares the sum with a threshold. MTL…

Emerging Technologies · Computer Science 2013-08-21 Mrigank Sharad , Deliang Fan , Kaushik Roy

Recent advances have demonstrated the promising capabilities of large language models (LLMs) in generating register-transfer level (RTL) code, such as Verilog. However, existing LLM-based frameworks still face significant challenges in…

Software Engineering · Computer Science 2025-09-09 Jian Zuo , Junzhe Liu , Xianyong Wang , Yicheng Liu , Navya Goli , Tong Xu , Hao Zhang , Umamaheswara Rao Tida , Zhenge Jia , Mengying Zhao

This paper describes a technique for inferring temporal-logic properties for sets of finite data streams. Such data streams arise in many domains, including server logs, program testing, and financial and marketing data; temporal-logic…

Logic in Computer Science · Computer Science 2020-06-09 Samuel Huang , Rance Cleaveland

Motivated by the challenge presented by non-Markovian objectives in reinforcement learning (RL), we present a novel framework to track and represent the progress of autonomous agents through complex, multi-stage tasks. Given a specification…

Machine Learning · Computer Science 2026-04-21 Noel Brindise , Cedric Langbort , Melkior Ornik

Ring topology is a simple configuration used to connect processes that communicate among themselves. A number of network standards such as token ring, token bus, and FDDI are based on the ring connectivity. This article will develop an…

Networking and Internet Architecture · Computer Science 2009-03-26 Virgiliu Streian , Adela Ionescu

Cross-lingual text classification leverages text classifiers trained in a high-resource language to perform text classification in other languages with no or minimal fine-tuning (zero/few-shots cross-lingual transfer). Nowadays,…

Computation and Language · Computer Science 2023-06-09 Inigo Jauregi Unanue , Gholamreza Haffari , Massimo Piccardi