Related papers: Design of TDC ASIC based on Temperature Compensati…

3D integration technologies are seeing widespread adoption in the semiconductor industry to offset the limitations and slowdown of two-dimensional scaling. High-density 3D integration techniques such as face-to-face wafer bonding with…

Radiation measurement relies on pulse detection, which can be performed using various configurations of high-speed analog-to-digital converters (ADCs) and field-programmable gate arrays (FPGAs). For optimal power consumption, design…

In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An…

In this study, we propose an all-solid cladding dual-core metal fiber (DC-MF) filled with toluene and ethanol for temperature sensing applications. Instead of using air holes in the cladding region, we employ fluorine doped silica glass to…

This letter studies an uplink integrated sensing and communication (ISAC) system using discrete Fourier transform spread orthogonal frequency division multiplexing (DFT-s-OFDM) transmission. We try to answer the following fundamental…

We present the design and the performance of MUX64, a 64-to-1 analogue multiplexer ASIC for the ATLAS High Granularity Timing Detector (HGTD). The MUX64 transmits one of its 64 inputs selected by six address lines for the voltages or…

A superconducting chip containing a regular array of flux qubits, tunable interqubit inductive couplers, an XY-addressable readout system, on-chip programmable magnetic memory, and a sparse network of analog control lines has been studied.…

This is the third part of four series papers, aiming at the delay compensation for the abstract linear system (A,B,C). Both the input delay and output delay are investigated. We first propose a full state feedback control to stabilize the…

This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015. The key goal of AL-DRAM is to exploit the extra margin that is built into the DRAM timing parameters to reduce DRAM latency. The key…

Silicon photonic devices fundamental to high-density wavelength-division multiplexed (DWDM) optical links and photonic switching networks, such as resonant modulators and Mach-Zehnder interferometers (MZIs), are highly sensitive to…

For TOF positron emission tomography (TOF PET) detectors, time-to-digital converters (TDCs) are essential to resolve the coincidence time of the photon pairs. Recently, an efficient TDC structure called ring-oscillator-based (RO-based)…

Transition-edge sensors (TESs) are used as very sensitive thermometers in microcalorimeters aimed at detection of different wavelengths. In particular, for soft X-ray astrophysics, science goals require very high resolution…

We have developed a large CdTe pixel detector with dimensions of 23.7 x 13.0 mm and a pixel size of 448 x 448 um^2. The detector is based on recent technologies of an uniform CdTe single crystal, a two-dimensional ASIC, and stud…

This work builds on the previous introduction [1] of a coupled experimental-computational system devised to fully characterize the thermal behavior of complex 3D submicron electronic devices. The new system replaces the laser-based surface…

We demonstrate an all-optical delay line in hot cesium vapor that tunably delays 275 ps input pulses up to 6.8 ns and 740 input ps pulses up to 59 ns (group index of approximately 200) with little pulse distortion. The delay is made tunable…

Acoustic pyrometry is a non-contact measurement technology for monitoring furnace combustion reaction, diagnosing energy loss due to incomplete combustion and ensuring safe production. The accuracy of time of flight (TOF) estimation of an…

Various chips for the silicon sensors measurements are described. These chips are based on 0.35 um and 0.18um CMOS technology. Several analog chips together with self-trigger /derandomizer one allow to measure silicon sensors designed for…

Modern CPUs with increasing core frequency and power are rapidly reaching a point where the CPU frequency and performance are limited by the amount of heat that can be extracted by the cooling technology. In mobile environment, this issue…

This paper presents the uTCA4.0-based BPM electronics for PIP-II, featuring four 250 MSPS ADCs and a Xilinx UltraScale+ MPSoC FPGA with 10 GbE uplink. Design elements include signal conditioning, clock, and thermal management. The FPGA…

In this study, a time fractional dual-phase-lag model with temperature jump boundary condition as a choice for the Fourier's law replacement in thermal modeling of transistors, is utilized. In more details, the numerical simulation of heat…