Development of BPM electronics for PIP-II at Fermilab

Shengli Liu; Nathan Eddy; A. Semenov; Brian Fellenz

Development of BPM electronics for PIP-II at Fermilab

Accelerator Physics 2025-09-22 v1

Authors: Shengli Liu , Nathan Eddy , A. Semenov , Brian Fellenz

Abstract

This paper presents the uTCA4.0-based BPM electronics for PIP-II, featuring four 250 MSPS ADCs and a Xilinx UltraScale+ MPSoC FPGA with 10 GbE uplink. Design elements include signal conditioning, clock, and thermal management. The FPGA performs signal processing, time tagging, digital down-conversion, and phase drift compensation. Position and phase resolution, and thermal stability - is validated through dedicated testing.

Keywords

BPM electronics PIP-II Fermilab FPGA ADC beam position monitor signal processing

Cite

@article{arxiv.2509.15388,
  title  = {Development of BPM electronics for PIP-II at Fermilab},
  author = {Shengli Liu and Nathan Eddy and A. Semenov and Brian Fellenz},
  journal= {arXiv preprint arXiv:2509.15388},
  year   = {2025}
}

Comments

14th International Beam Instrumentation Conference IBIC 2025 (IBIC 2025)

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