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A scalable quantum information processing architecture based on silicon metal-oxide-semiconductor technology is presented, combining quantum hardware elements from planar and 3D silicon-on-insulator technologies. This architecture is…
Atomically thin two-dimensional (2D) materials are promising candidates for sub-10 nm transistor channels due to their ultrathin body thickness, which results in strong electrostatic gate control. Properly scaling a transistor technology…
Existing efforts to boost multimodal fusion of 3D anomaly detection (3D-AD) primarily concentrate on devising more effective multimodal fusion strategies. However, little attention was devoted to analyzing the role of multimodal fusion…
This report is a brief review of the recent work on architectures for the prospective hybrid CMOS/nanowire/ nanodevice ("CMOL") circuits including digital memories, reconfigurable Boolean-logic circuits, and mixed-signal neuromorphic…
The cost of enabling connectivity in Noisy-Intermediate-Scale-Quantum devices is an important factor in determining computational power. We have created a qubit routing algorithm which enables efficient global connectivity in a previously…
Three-dimensional integration technologies such as flip-chip bonding are a key prerequisite to realize large-scale superconducting quantum processors. Modular architectures, in which circuit elements are spread over multiple chips, can…
Two dimensional (2D) crystal heterostructures are shown to possess a unique opportunity for novel THz nonlinear devices. In contrast to the oxide tunneling barrier, the uniformity of 2D insulators in the thickness control provides an ideal…
Metal inter-layer via (MIV) in Monolithic three-dimensional integrated circuits (M3D-IC) is used to connect inter-layer devices and provide power and clock signals across multiple layers. The size of MIV is comparable to logic gates because…
This paper considers the design of On-Demand Multimodal Transit Systems (ODMTS) that combine fixed bus/rail routes between transit hubs with on-demand shuttles that serve the first/last miles to/from the hubs. The design problem aims at…
As the gap between network and CPU speeds rapidly increases, the CPU-centric network stack proves inadequate due to excessive CPU and memory overhead. While hardware-offloaded network stacks alleviate these issues, they suffer from limited…
Low power consumption in both static and dynamic modes of operation is a key requirement in modern, highly scaled nanoelectronics. Tunneling field-effect transistors (TFETs) that exploit direct band-to-band tunneling of charges and exhibit…
Two-dimensional (2D) transition metal dichalcogenides (TMDs) are promising platforms for low dimensional superconductivity. However, in conventional intercalated systems, achieving a high superconducting transition temperature (Tc) often…
This work introduces the design analysis simulation and a standard MEMS fabrication process for a three dimensional microcoil with a magnetic core and a digital switch configuration using a completely integrated fully MEMS compatible…
The performance and capacity of solid-state drives (SSDs) are continuously improving to meet the increasing demands of modern data-intensive applications. Unfortunately, communication between the SSD controller and memory chips (e.g., 2D/3D…
The end of conventional Dennard scaling and the widening gap between memory bandwidth and arithmetic throughput have made the von Neumann partition a structural bottleneck rather than a transient one. Two-dimensional (2D) materials, with…
A superconducting quantum interference device (SQUID) miniaturized into nanoscale is promising in the inductive detection of a single electron spin. A nano-SQUID with a strong spin coupling coefficient, a low flux noise, and a wide working…
Today, continued miniaturization in electronic integrated circuits (ICs) appears to have reached its fundamental limit. At the same time, energy consumption due by communication becomes the dominant limitation in high performance electronic…
Strain engineering has played a key role in modern silicon electronics, having been introduced as a mobility booster in the 1990s and commercialized in the early 2000s. Achieving similar advances with two-dimensional (2D) semiconductors in…
Inspired by the challenge of scaling up existing silicon quantum hardware, we investigate compilation strategies for sparsely-connected 2d qubit arrangements and propose a spin-qubit architecture with minimal compilation overhead. Our…
Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence…