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Large language model (LLM) decoding is a major inference bottleneck because its low arithmetic intensity makes performance highly sensitive to memory bandwidth. 3D-stacked near-memory processing (NMP) provides substantially higher local…

Non-reciprocal charge transport in supercurrent diodes (SDs) polarized growing interest in the last few years for its potential applications in superconducting electronics (SCE). So far, SD effects have been reported in complex hybrid…

A three-dimensional (3D) Network-on-Chip (NoC) enables the design of high performance and low power many-core chips. Existing 3D NoCs are inadequate for meeting the ever-increasing performance requirements of many-core processors since they…

As deep neural network (DNN) models are growing exponentially in size, their deployment on resource-constrained edge platforms is becoming increasingly challenging. In-memory-computing (IMC) with non-volatile memories (NVMs) has emerged as…

To overcome the well-known memory bottleneck of AI chips, 3D stacked architectures that employ advanced packaging technology with high-density through-silicon vias (TSVs) pins have proven to be a promising solution. The 3D-stacked AI chip…

3D interconnects have emerged as a solution to address the scaling issues of interconnect bandwidth and the memory wall problem in high-performance computing (HPC), such as High-Bandwidth Memory (HBM). However, the copper-based electrical…

Modular trapped-ion quantum computing hardware, known as QCCDs require shuttling operations in order to maintain effective all-to-all connectivity. Each module or trap can perform only one operation at a time, resulting in low intra-trap…

Scanning superconducting quantum interference device microscopy (sSQUID) is currently one of the most effective methods for direct and sensitive magnetic flux imaging on the mesoscopic scale. A SQUID-on-chip design allows integration of…

In this article, we present a technology development of a superconducting qubit device 3D-integrated by flip-chip-bonding and processed following CMOS fabrication standards and contamination rules on 200 mm wafers. We present the utilized…

Reconfigurable intelligent surfaces (RIS) is regarded as a key enabler of wave/analog-domain beamforming, processing, and computing in future wireless communication systems. Recently, Beyond Diagonal RIS (BD-RIS) has been proposed as a…

Multifunctional three-dimensional (3-D) nano-architectures, integrating all device components within tens of nanometers, offer great promise for next generation electrical energy storage applications, but have remained challenging to…

As the field of superconducting quantum computing advances from the few-qubit stage to larger-scale processors, qubit addressability and extensibility will necessitate the use of 3D integration and packaging. While 3D integration is…

Cascaded or stacked intelligent metasurfaces (SIMs) have emerged as a promising technology to overcome the physical limitations of single-layer reconfigurable intelligent surfaces (RISs) in wideband wireless communication. By intelligently…

In this work, we present a numerical model specifically designed for 3D multilayer devices, with a focus on nanobridge junctions and coplanar waveguides. Unlike existing numerical models, ours does not approximate the physical layout or…

Superconductivity in the two-dimensional (2D) limit is a fertile ground for exotic quantum phenomena-many of which remain elusive in their 3D counterparts. While studies of 2D superconductivity have predominantly focused on mono- or…

Three-dimensional (3D) superconducting microwave cavities with large mode volumes typically have high quality factors ($>10^6$). This is due to a reduced sensitivity to surface dielectric losses, which is the limiting source of dissipation…

Mode-division multiplexing has emerged as a promising route for increasing transmission capacity while maintaining the same level of on-chip integration. Despite the large number of on-chip mode converters and multiplexers reported for the…

Emergent nanoscale non-volatile memory technologies with high integration density offer a promising solution to overcome the scalability limitations of CMOS-based neural networks architectures, by efficiently exhibiting the key principle of…

To reach large-scale quantum computing, three-dimensional integration of scalable qubit arrays and their control electronics in multi-chip assemblies is promising. Within these assemblies, the use of superconducting interconnections, as…

The Von Neumann bottleneck, which relates to the energy cost of moving data from memory to on-chip core and vice versa, is a serious challenge in state-of-the-art AI architectures, like Convolutional Neural Networks' (CNNs) accelerators.…