Related papers: The Pixel-TPC: first results from an 8-InGrid modu…

This work presents the 8-channel FastIC+, a low-power consumption and highly configurable multi-channel front-end ASIC with internal digitization, for the readout of photo-sensors with picosecond time resolution and intrinsic gain. This…

A PC based high speed silicon microstrip beam telescope consisting of several independent modules is presented. Every module contains an AC-coupled double sided silicon microstrip sensor and a complete set of analog and digital signal…

This contribution investigates a prototype of a TPC readout with a highly pixelated CMOS ASIC, which is an option for charged particles tracking of the ILC. A triple GEM stack was joined with a TimePix and MediPix2 chip (pixel size of…

A front end ASIC has been designed to equip the {\mu}TPC prototype developed for the MIMAC project, which requires 3D reconstruction of low energy particle tracks in order to perform directional detection of galactic Dark Matter. Each ASIC…

One of the three X-ray detectors of the CAST experiment searching for solar axions is a Time Projection Chamber (TPC) with a multi-wire proportional counter (MWPC) as a readout structure. Its design has been optimized to provide high…

Time-digital Converter (TDC) aims to measure the arrival time of the leading edge of the pulse signal. Our recent work presented a high resolution multi-phase TDC based on the Kintex-7 Field Programmable Gate Array (FPGA) device. A simple…

A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is…

The International Linear Collider (ILC) Time Projection Chamber (TPC) transverse space-point resolution goal is 100 microns for all tracks including stiff 90 degree tracks with the full 2 meter drift. A Micro Pattern Gas Detector (MPGD)…

A new TDC chip has been developed for the COMPASS experiment at CERN. The resulting ASIC offers an unprecedented degree of flexibility and functionality. Its capability to handle highest hit and trigger input rates as well as its low power…

We present a smart pixel prototype readout integrated circuit (ROIC) designed in CMOS 28 nm bulk process, with in-pixel implementation of an artificial intelligence (AI) / machine learning (ML) based data filtering algorithm designed as…

An upgrade of the near detector of the T2K long baseline neutrino oscillation experiment is currently being conducted. This upgrade will include two new Time Projection Chambers, each equipped with 16 charge readout resistive Micromegas…

PARISROC is a complete read out chip, in AMS SiGe 0.35 micron technology [1], for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and it belongs to an R&D program funded by the French…

In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An…

The CMS experiment at the LHC includes a hybrid silicon pixel detector for the reconstruction of charged tracks and of the interaction vertices. The detector is made of three barrel layers and two disks at each end of the barrel. Detector…

Calorimetry at future linear colliders could be based on a particle flow approach where granularity is the key to high jet energy resolution. Among different technologies, Micromegas chambers with 1 cm2 pad segmentation are studied for the…

This paper presents a novel pixel chip readout scheme: the Region-of-Interest Readout Circuit (ROIRC), which is designed for large area, large array pixel chips and Gas Pixel Detector (GPD). This design employs a sentinel pixel detection…

A readout system based on the Timepix4 ASIC, is being developed for photon science. The TEMPUS detector can be operated in two distinct modes: a photon counting mode, which allows for conventional full-frame readout at rates up to 40 kfps;…

The MALTA CMOS monolithic silicon pixel sensors has been developed in the Tower 180 nm CMOS imaging process. It includes an asynchronous readout scheme and complies with the ATLAS inner tracker requirements for the HL-LHC. Several 4-chip…

Analogue test structures were fabricated using the Tower Partners Semiconductor Co. CMOS 65 nm ISC process. The purpose was to characterise and qualify this process and to optimise the sensor for the next generation of Monolithic Active…

A time projection chamber (TPC) with micropattern gaseous detector (MPGD) readout is investigated as main tracking device of the International Large Detector (ILD) concept at the planned International Linear Collider (ILC). A prototype TPC…