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A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is…

A radiation-hard quad-channel 12-bit 40 MSPS pipeline analog-to-digital converter (ADC) has been designed for the trigger readout electronics Phase-I upgrade of the ATLAS Liquid Argon calorimeter, at the CERN Large Hadron Collider. The…

A new TDC-chip is under development for the COMPASS experiment at CERN. The ASIC, which exploits the 0.6 micrometer CMOS sea-of-gate technology, will allow high resolution time measurements with digitization of 75 ps, and an unprecedented…

The present article introduces a novel ASIC architecture, designed in the context of the ATLAS Tile Calorimeter upgrade program for the High-Luminosity phase of the Large Hadron Collider at CERN. The architecture is based on…

Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator…

The rise of generative AI for tasks like Automatic Speech Recognition (ASR) has created a critical energy consumption challenge. While ASICs offer high efficiency, they lack the programmability to adapt to evolving algorithms. To address…

In this paper, deep sub-micron CMOS process compatible high Q on chip spiral inductors with air gap structure were designed and fabricated. In the design the electromagnetic were used for electrical-characteristics and maximum mechanical…

Artificial visual systems (AVS) have gained tremendous momentum because of its huge potential in areas such as autonomous vehicles and robotics as part of artificial intelligence (AI) in recent years. However, current machine visual systems…

To improve mobility of fabricated silicon metal-oxide-semiconductor (MOS) quantum devices, forming gas annealing is a common method used to mitigate the effects of disorder at the Si/SiO2 interface. However, the importance of activation…

The attention mechanism is a key computing kernel of Transformers, calculating pairwise correlations across the entire input sequence. The computing complexity and frequent memory access in computing self-attention put a huge burden on the…

This paper presents an in-memory computing (IMC) architecture developed on an 8x8 array of 8T SRAM cells. This architecture enables both multi-bit parallel Multiply-Accumulate (MAC) operations and standard memory processing through…

Samples of the monolithic silicon pixel ASIC prototype produced in 2022 within the framework of the Horizon 2020 MONOLITH ERC Advanced project were irradiated with 70 MeV protons up to a fluence of 1 x 1016 neq/cm2, and then tested using a…

A switched-capacitor matrix multiplier is presented for approximate computing and machine learning applications. The multiply-and-accumulate operations perform discrete-time charge-domain signal processing using passive switches and 300 aF…

The generation of optical pulses at ultra low bias level, thus low energy cost, is explored in a commercial microcavity semiconductor laser in view of testing the principle of energy efficient information encoding in potential integrated…

Analyzing and controlling large distributed services under a wide range of conditions is difficult. Yet these capabilities are essential to a number of important development and operational tasks such as benchmarking, testing, and system…

This paper presents a novel approach utilizing a scalable neural decoder application-specific integrated circuit (ASIC) based on metal oxide memristors in a 180nm CMOS technology. The ASIC architecture employs in-memory computing with…

For nanoscale CMOS applications, strained-silicon devices have been receiving considerable attention owing to their potential for achieving higher performance and compatibility with conventional silicon processing. In this work, an…

Front-end electronics equipped with high-speed digitizers are being used and proposed for future nuclear detectors. Recent literature reveals that deep learning models, especially one-dimensional convolutional neural networks, are promising…

Low driving voltage (Vpp), high-speed silicon microring modulator plays a critical role in energy-efficient optical interconnect and optical computing systems owing to its ultra-compact footprint and capability for on-chip…

This paper introduces an optically controlled 4H-SiC MOSFET designed to avoid the gate-oxide interface unreliability and electromagnetic interference (EMI) susceptibility inherent in conventional voltage-driven devices. By replacing the…