Related papers: A New Design for Array Multiplier with Trade off i…

The progress of the Internet of Things(IoT) technologies and applications requires the efficient low power circuits and architectures to maintain and improve the performance of the increasingly growing data processing systems. Memristive…

The paper presents a systematic study and implementation of a reconfigurable combinatorial multi-operand adder for use in Deep Learning systems. The size of carry changes with the number of operands and hence a reliable algorithm to…

Conventional hybrid analog-digital architectures for millimeter-wave massive multiple-input multiple-output (MIMO) systems suffer from poor scalability and high implementational costs. The former is caused by the high power loss in the…

Reducing power consumption in AI accelerators is increasingly important. Approximate computing can reduce power consumption while keeping the accuracy loss small. Since multipliers are power-hungry components in AI models, this paper…

In this paper we consider a simple cooperative network consisting of a source, a destination and a cluster of decode-and-forward half-duplex relays. At each time-slot, the source and (possibly) one of the relays transmit a packet to another…

In CMOS-based electronics, the most straightforward way to implement a summation operation is to use the ripple carry adder (RCA). Magnonics, the field of science concerned with data processing by spin-waves and their quanta magnons,…

We demonstrate that substantial power gain can be obtained with superconducting transition detectors. We describe the properties of the detector as a power amplifier theoretically. In our first experiments power gain of 23 was reached in a…

This paper proposes the implementation of programmable threshold logic gate (TLG) crossbar array based on modified TLG cells for high speed processing and computation. The proposed TLG array operation does not depend on input signal and…

This paper considers a multiple input multiple output (MIMO) two-way relay channel, where two nodes want to exchange data with each other using multiple relays. An iterative algorithm is proposed to achieve the optimal achievable rate…

We consider the problem of constructing fast and small parallel prefix adders for non-uniform input arrival times. This problem arises whenever the adder is embedded into a more complex circuit, e. g. a multiplier. Most previous results are…

In this paper, an energy-efficient cross-layer design framework is proposed for cooperative relaying networks, which takes into account the influence of spectrum utilization probability. Specifically, random arrival traffic is considered…

In recent years, reversible logic has emerged as a promising computing paradigm having application in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not…

The MUX implementation of ternary half adders and full adders using predecessor and successor functions lead to the most efficient efficient implementation using the smallest transistor count. These designs are compared with the binary…

A 16-element, compact phased array transceiver is demonstrated at E-band (71-76 and 81-86GHz). A Weaver image selection architecture reduces the LO tuning range to 3GHz while covering the 10GHz band. The bidirectional and efficient…

In the past few years, advancements in the field of nano circuit design has become tougher than the demand. Low power devices have emerged tremendously.Both voltage mode aswell as current mode devices have proven alternative to each other…

Circuit design based on Quantum-dots Cellular Automata technology offers power-efficiency and nano-size circuits. It is an attractive alternative to CMOS technology. The XOR gate is a widely used building element in arithmetic circuits. An…

Wallace tree multipliers are a parallel digital multiplier architecture designed to minimize the worst-case time complexity of the circuit depth relative to the input size [1]. In particular, it seeks to perform long multiplication in the…

We designed 4x4 matrix TFTs arrays using current mirror amplifiers. Advantages of current mirror amplifiers are they need less requiring switches and the conversion time is short. The TFTs arrays 4x4 matrix using current mirror circuits…

Incorporating full duplex operation in Multiple Input Multiple Output (MIMO) systems provides the potential of boosting throughput performance. However, the hardware complexity of the analog self-interference canceller in emerging full…

This paper presents the Hybrid Overestimating Approximate Adder designed to enhance the performance in processing engines, specifically focused on edge AI applications. A novel Plus One Adder design is proposed as an incremental adder in…