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The progress of the Internet of Things(IoT) technologies and applications requires the efficient low power circuits and architectures to maintain and improve the performance of the increasingly growing data processing systems. Memristive…
Recently, accelerators for extremely quantized deep neural network (DNN) inference with operand widths as low as 1-bit have gained popularity due to their ability to largely cut down energy cost per inference. In this paper, a flexible SoC…
Adder cells using Gate Diffusion Technique (GDI) & PTL-GDI technique are described in this paper. GDI technique allows reducing power consumption, propagation delay and low PDP (power delay product) whereas Pass Transistor Logic (PTL)…
TiO2 ferroelectric field effect transistors (FeFETs) with HfZrO2 (HZO) ferroelectric dielectric layers and bottom gate topology are fabricated for applications in neuromorphic systems. Two sets of devices are fabricated with different gate…
Energy-efficient sense amplifier (SA) circuits are essential for reliable detection of stored memory states in emerging memory systems. In this work, we present four novel sense amplifier (SA) topologies based on phase transition material…
In this paper a low power and low area array multiplier with carry save adder is proposed. The proposed adder eliminates the final addition stage of the multiplier than the conventional parallel array multiplier. The conventional and…
We present a 4-bit Arithmetic Logic Unit (ALU) utilizing superconductor technology. The ALU serves as the central processing unit of a processor, performing crucial arithmetic and logical operations. We have adopted a bit-parallel…
Fine-tuning pre-trained transformer models, e.g., Swin Transformer, are successful in numerous downstream for dense prediction vision tasks. However, one major issue is the cost/storage of their huge amount of parameters, which becomes…
Floating gate transistor is the basic building block of non-volatile flash memory, which is one of the most widely used memory gadgets in modern micro and nano electronic applications. Recently there has been a surge of interest to…
The Dadda algorithm is a parallel structured multiplier, which is quite faster as compared to array multipliers, i.e., Booth, Braun, Baugh-Wooley, etc. However, it consumes more power and needs a larger number of gates for hardware…
Approximate multipliers are widely being advocated for energy-efficient computing in applications that exhibit an inherent tolerance to inaccuracy. However, the inclusion of accuracy as a key design parameter, besides the performance, area…
In recent years, three-dimensional GaN-based transistors have been intensively studied for their dramatically improved output power, better gate controllability, and shorter channels for speedup and miniaturization. However, thermal…
Predicting effective thermal conductivity by solving a Partial Differential Equation (PDE) defined on a high-resolution Representative Volume Element (RVE) is a computationally intensive task. In this paper, we tackle the task by proposing…
Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. Apart from the basic addition adders also used in performing useful operations such as subtraction,…
Fluid antenna (FA) systems offer novel spatial degrees of freedom (DoFs) with the potential for significant performance gains. Compared to existing works focusing solely on optimizing FA positions at discrete time instants, we introduce the…
Plasmonic near-field transducers (NFTs) play a key role in administering nanoscale heating for a number of applications ranging from medical devices to next generation data processing technology. We present a novel multi-scale approach,…
Weighted finite-state transducers (FSTs) are frequently used in language processing to handle tasks such as part-of-speech tagging and speech recognition. There has been previous work using multiple CPU cores to accelerate finite state…
Enhancing power efficiency and performance in neuromorphic computing systems is critical for next-generation artificial intelligence applications. We propose the Nanoscale Side-contacted Field Effect Diode (S-FED), a novel solution that…
This paper presents a novel and lightweight hyperparameter optimization (HPO) method, MOdular FActorial Design (MOFA). MOFA pursues several rounds of HPO, where each round alternates between exploration of hyperparameter space by factorial…
The Fast Tracker (FTK) is an ATLAS trigger upgrade built for full event, low-latency, high-rate tracking. The FTK core, made of 9U VME boards, performs the most demanding computational task. The Associative Memory Board Serial Link…