Related papers: Analytical Drain Current Model of Nanoscale Strain…
We have presented a compact MOSFET model, which allows us to describe the I-V characteristics of irradiated long-channel and short-channel transistors in all operation modes at different measurement temperatures and interface trap…
Strain-engineering in SiGe nanostructures is fundamental for the design of optoelectronic devices at the nanoscale. Here we explore a new strategy, where SiGe structures are laterally confined by the Si substrate, to obtain high tensile…
In this paper, we propose a new trench power MOSFET with strained Si channel that provides lower on resistance than the conventional trench MOSFET. Using a 20% Ge mole fraction in the Si1-xGex body with a compositionally graded Si1-xGex…
This work presents a physics based compact model for SiC power MOSFETs that accurately describes the I-V characteristics up to large voltages and currents. Charge-based formulations accounting for the different physics of SiC power MOSFETs…
By generalizing the classical linear response theory of stick percolation to nonlinear regime, we find that the drain current of a Nanobundle Thin Film Transistor (NB-TFT) is described under a rather general set of conditions by a universal…
As metal-oxide-semiconductor field-effect transistors (MOSFET) channel lengths (Lg) are scaled to lengths shorter than Lg<8 nm source-drain tunneling starts to become a major performance limiting factor. In this scenario a heavier transport…
In this paper we have developed a two dimensional (2D) analytical model for surface potential and drain current for a long channel Dual Material Gate (DMG) Silicon-on-Insulator (SOI) Tunneling Field Effect Transistor (TFET). This model…
The doped silicon regions (tubs) in PWFDSOI MOSFET cause significant reduction in OFF current by reducing the number of carriers contributing to the OFF current. The emphasis of the simulation and device physics study on PWFDSOI MOSFET…
As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits; many novel device structures are being extensively explored. Among them, the silicon nanowire transistor (SNWT) has…
In this paper, Capacitance-Voltage (C-V) characteristics and direct tunneling (DT) gate leakage current of antimonide based surface channel MOSFET were investigated. Self-consistent method was applied by solving coupled…
In strained mechanical resonators, the concurrence of tensile stress and geometric nonlinearity dramatically reduces dissipation. This phenomenon, dissipation dilution, is employed in mirror suspensions of gravitational wave interferometers…
SiGe islands are used to induce tensile strain in the Si channel of Field Effect Transistors to achieve larger transconductance and higher current driveabilities. We report on x-ray diffraction experiments on a single fully-processed and…
A model is developed for a detailed investigation of the current flowing through a cylindrical nanosize MOSFET with a close gate electrode. The quantum mechanical features of the lateral charge transport are described by Wigner distribution…
Design considerations for a below 100 nm channel length SOI MOSFET with electrically induced shallow source/drain junctions are presented. Our simulation results demonstrate that the application of induced source/drain extensions to the SOI…
In recent part extensive simulation work has already been done on TFETs. However this is limited to device performance analysis. Evaluation of circuit performance is a topic that is very little touched. This is due to the non availability…
Capacitance-Voltage (C-V) & Ballistic Current- Voltage (I-V) characteristics of Double Gate (DG) Silicon-on- Insulator (SOI) Flexible FETs having sub 35nm dimensions are obtained by self-consistent method using coupled Schrodinger- Poisson…
The miniaturization of transistors down to 5nm and beyond, plus the increasing complexity of integrated circuits, significantly aggravate short channel effects, and demand analysis and optimization of more design corners and modes.…
In this paper, an analytical predictive model of the negative capacitance (NC) effect in symmetric long channel double-gate junctionless transistor is proposed based on a charge-based model. In particular, we have investigated the effect of…
In this work, we investigate the transport phenomena in compound semiconductor material based buried channel Quantum Well MOSFET with a view to developing a simple and effective model for the device current. Device simulation has been…
A first-principle model is proposed to study the electrostatic properties of a double-gated silicon slab of nano scale in the framework of density functional theory. The applied gate voltage is approximated as a variation of the…