Related papers: Extended-p+ Stepped Gate (ESG) LDMOS for Improved …

In this work, we propose a new Stepped Oxide Hetero-Material Trench (SOHMT) power MOSFET with three sections in the trench gate (an N+ poly gate sandwiched between two P+ poly gates) and having different gate oxide thicknesses (increasing…

In this paper, we propose a new trench power MOSFET with strained Si channel that provides lower on resistance than the conventional trench MOSFET. Using a 20% Ge mole fraction in the Si1-xGex body with a compositionally graded Si1-xGex…

We propose and demonstrate a relaxed-SiGe/strained-Si (SiGe/s-Si) enhancement-mode gate stack for quantum dots. The enhancement-mode SiGe/s-Si structure is pursued because it spaces the quantum dot away from charge and spin defect rich…

We present a novel p-GaN gate HEMT structure with reduced hole concentration near the Schottky interface by doping engineering in MOCVD, which aims at lowering the electric field across the gate. By employing an additional unintentionally…

In this letter, we report on a unique device design strategy for increasing the breakdown voltage and hence Baliga Figure of Merit (BFOM) of III-nitride HEMTs by engineering the gate edge towards the drain. The breakdown of such devices…

This paper presents a new \b{eta}-Ga2O3 junctionless double gate Metal-Oxide-Field-Semiconductor-Effect-Transistor (\b{eta}DG-JL-FET) that a P+ packet embedded in the oxide layer (PO-\b{eta}DG-JL-FET) for high-voltage applications. Our goal…

This paper enumerates new architecture of low power dual-edge triggered Flip-Flop (DETFF) designed at 180nm CMOS technology. In DETFF same data throughput can be achieved with half of the clock frequency as compared to single edge triggered…

In this article, we proposed a Variable threshold MOSFET(VTMOS)approach which is realized from Dynamic Threshold MOSFET(DTMOS), suitable for sub-threshold digital circuit operation. Basically the principle of sub- threshold logics is…

In this letter we not only show improvement in the performance but also in the reliability of 30nm thick biaxially strained SiGe (20%Ge) channel on Si p-MOSFETs. Compared to Si channel, strained SiGe channel allows larger hole mobility…

In this work, we demonstrate a dual-gated (DG) MoS2 field effect transistors (FETs) in which the degraded switching performance of multilayer MoS2 can be compensated by the DG structure. It produces large current density (>100 {\mu}A/{\mu}m…

This paper projects the enhanced drive current of a n-type electrostatically doped (ED) tunnel field-effect transistor (ED-TFET) based on heterojunction and band-gap engineering via TCAD 2-D device simulations. The homojunction ED-TFET…

In this paper, we propose a simulation-based novel Split-Gate Trench MOSFET structure with an optimized fabrication process to enhance power efficiency, switching speed, and thermal stability for high-performance semiconductor applications.…

Scalability and performance of current flash memories can be improved substantially by replacing the floating poly-Si gate by a layer of Si dots. This multi-dot layer can be fabricated CMOS-compatibly in very thin gate oxide by ion beam…

The doped silicon regions (tubs) in PWFDSOI MOSFET cause significant reduction in OFF current by reducing the number of carriers contributing to the OFF current. The emphasis of the simulation and device physics study on PWFDSOI MOSFET…

This paper introduces an optically controlled 4H-SiC MOSFET designed to avoid the gate-oxide interface unreliability and electromagnetic interference (EMI) susceptibility inherent in conventional voltage-driven devices. By replacing the…

A robust power gating design using Graphene Nano-Ribbon Field Effect Transistors (GNRFET) is proposed using 16nm technology. The Power Gating (PG) structure is composed of GNRFET as a power switch and MOS power gated module. The proposed…

Scalability in the fabrication and operation of quantum computers is key to move beyond the NISQ era. So far, superconducting transmon qubits based on aluminum Josephson tunnel junctions have demonstrated the most advanced results, though…

This paper critically examines the leakage current reduction techniques for improving the performance of poly-Si TFTs used in active matrix liquid crystal displays. This is a first comprehensive study in literature on this topic. The review…

A light-emitting-diodes (LEDs)-integrated silicon carbide (SiC) insulated gate bipolar transistors (LI-IGBT) is proposed in this paper. The novelty of the LI-IGBT depends on the photogeneration effect of III-nitride LEDs embedded in the…

Extended Floating Gate Field Effect Transistors (EGFETs) are CMOS-compatible floating gate devices capable of detecting charges on their sensing area by the relative shifts in current-voltage (I-V) characteristics. The I-V shifts are…