The increasing resistance of Cu interconnects for decreasing dimensions is a major challenge in continued downscaling of integrated circuits beyond the 7-nm technology node as it leads to unacceptable signal delays and power consumption in computing. The resistivity of Cu increases due to electron scattering at surfaces and grain boundaries of the interconnects at the nanoscale. Topological semimetals, owing to their topologically protected surface states and suppressed electron backscattering, are promising material candidates to potentially replace current Cu interconnects as low-resistance interconnects. Here, we report the attractive resistivity scaling of topological metal MoP nanowires and show that the resistivity values are comparable to those of Cu interconnects below 500 nm2 cross-section areas. More importantly, we demonstrate that the dimensional scaling of MoP nanowires, in terms of line resistance versus total cross-sectional area, is superior to those of effective Cu and barrier-less Ru interconnects, suggesting MoP is an attractive solution to the current scaling challenge of Cu interconnects.
@article{arxiv.2208.02784,
title = {Topological Metal MoP Nanowire for Interconnect},
author = {Hyeuk Jin Han and Sushant Kumar and Xiaoyang Ji and James L. Hart and Gangtae Jin and David J. Hynek and Quynh P. Sam and Vicky Hasse and Claudia Felser and David G. Cahill and Ravishankar Sundararaman and Judy J. Cha},
journal= {arXiv preprint arXiv:2208.02784},
year = {2022}
}