Status of the QPACE Project
High Energy Physics - Lattice
2010-01-21 v1
Abstract
We give an overview of the QPACE project, which is pursuing the development of a massively parallel, scalable supercomputer for LQCD. The machine is a three-dimensional torus of identical processing nodes, based on the PowerXCell 8i processor. The nodes are connected by an FPGA-based, application-optimized network processor attached to the PowerXCell 8i processor. We present a performance analysis of lattice QCD codes on QPACE and corresponding hardware benchmarks.
Cite
@article{arxiv.0810.1559,
title = {Status of the QPACE Project},
author = {H. Baier and H. Boettiger and M. Drochner and N. Eicker and U. Fischer and Z. Fodor and G. Goldrian and S. Heybrock and D. Hierl and T. Huth and B. Krill and J. Lauritsen and T. Lippert and T. Maurer and J. McFadden and N. Meyer and A. Nobile and I. Ouda and M. Pivanti and D. Pleiter and A. Schäfer and H. Schick and F. Schifano and H. Simma and S. Solbrig and T. Streuer and K. H. Sulanke and R. Tripiccione and T. Wettig and F. Winter},
journal= {arXiv preprint arXiv:0810.1559},
year = {2010}
}
Comments
7 pages, poster presented at the XXVI International Symposium on Lattice Field Theory, July 14-19, 2008, Williamsburg, Virginia, USA