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This paper describes two research projects that develop new low-cost techniques for testing devices with multiple high-speed (2 to 5 Gbps) signals. Each project uses commercially available components to keep costs low, yet achieves…

硬件体系结构 · 计算机科学 2011-11-09 D. C. Keezer , C. Gray , A. Majid , N. Taher

Graph processing has become an important part of various areas, such as machine learning, computational sciences, medical applications, social network analysis, and many others. Various graphs, for example web or social networks, may…

分布式、并行与集群计算 · 计算机科学 2019-04-30 Maciej Besta , Dimitri Stanojevic , Johannes De Fine Licht , Tal Ben-Nun , Torsten Hoefler

Whilst Field-Programmable Gate Arrays (FPGAs) have been popular in accelerating high-frequency financial workload for many years, their application in quantitative finance, the utilisation of mathematical models to analyse financial markets…

分布式、并行与集群计算 · 计算机科学 2024-02-20 Mark Klaisoongnoen , Nick Brown , Tim Dykes , Jessica R. Jones , Utz-Uwe Haus

A multi-layer trigger system, based on programmable logic devices hosted on VME boards, has been implemented. It is completely scalable and suitable for handling from a few up to a few hundred channels. Custom software for monitoring and…

Computational grids typically consist of nodes utilizing ordinary processors such as the Intel Pentium. Field Programmable Gate Arrays (FPGAs) are able to perform certain compute-intensive tasks very well due to their inherent parallel…

分布式、并行与集群计算 · 计算机科学 2007-05-23 Darran Nathan , Ralf Clemens

FPGA is appropriate for fix-point neural networks computing due to high power efficiency and configurability. However, its design must be intensively refined to achieve high performance using limited hardware resources. We present an…

硬件体系结构 · 计算机科学 2022-01-03 Qingyang Yi , Heming Sun , Masahiro Fujita

Reconfigurable computing refers to the use of processors, such as Field Programmable Gate Arrays (FPGAs), that can be modified at the hardware level to take on different processing tasks. A reconfigurable computing platform describes the…

硬件体系结构 · 计算机科学 2007-05-23 Darran Nathan , Kelvin Lim Mun Kit , Kelly Choo Hon Min , Philip Wong Jit Chin , Andreas Weisensee

The Thomas Jefferson National Accelerator Facility (Jefferson Lab) control system uses a nameserver to reduce system response time and to minimize the impact of client name resolution on front-end computers. The control system is based on…

加速器物理 · 物理学 2014-11-18 J. Sage , M. H. Bickley , K. S. White

Programmable photonic integrated circuits (PICs) offer a unique opportunity to create a flexible platform, akin to electronic field programmable gate array (FPGA). These photonic PGAs can implement versatile functionalities for applications…

光学 · 物理学 2025-06-25 Rui Chen , Andrew Tang , Jayita Dutta , Virat Tara , Julian Ye , Zhuoran Fang , Arka Majumdar

Neuromorphic computing is a relatively new discipline of computer science, where the principles of biological brain's computation and memory are used to create a new way of processing information, based on networks of spiking neurons. Those…

硬件体系结构 · 计算机科学 2026-05-19 Wiktor J. Szczerek , Artur Podobas

Coarse-Grained Reconfigurable Arrays (CGRA) are promising edge accelerators due to the outstanding balance in flexibility, performance, and energy efficiency. Classic CGRAs statically map compute operations onto the processing elements (PE)…

硬件体系结构 · 计算机科学 2023-09-20 Dan Wu , Peng Chen , Thilini Kaushalya Bandara , Zhaoying Li , Tulika Mitra

We will use EPICS toolkit [1] to build a prototype for upgrading BEPC control system. The purposes are for the following three aspects: (1) Setup a network based distributed control system with EPICS. (2) Study some front-end control…

加速器物理 · 物理学 2007-05-23 C. H. Wang , X. C. Kong , G. Lei , S. F. Xu , Q. Le , J. Zhao

A new generation of radio telescopes is achieving unprecedented levels of sensitivity and resolution, as well as increased agility and field-of-view, by employing high-performance digital signal processing hardware to phase and correlate…

In recent years the computing landscape has seen an in- creasing shift towards specialized accelerators. Field pro- grammable gate arrays (FPGAs) are particularly promising as they offer significant performance and energy improvements…

分布式、并行与集群计算 · 计算机科学 2015-11-24 Raghu Prabhakar , David Koeplinger , Kevin Brown , HyoukJoong Lee , Christopher De Sa , Christos Kozyrakis , Kunle Olukotun

This article provides a survey of academic literature about field programmable gate array (FPGA) and their utilization for energy efficiency acceleration in data centers. The goal is to critically present the existing FPGA energy…

分布式、并行与集群计算 · 计算机科学 2023-09-25 Mattia Tibaldi , Christian Pilato

FPGA accelerators are gaining increasing attention in both cloud and edge computing because of their hardware flexibility, high computational throughput, and low power consumption. However, the design flow of FPGAs often requires specific…

硬件体系结构 · 计算机科学 2021-02-22 Masudul Hassan Quraishi , Erfan Bank Tavakoli , Fengbo Ren

In large process control systems it frequently becomes desirable to establish feedback relationships that were not anticipated during the design phase of the project. The "Generic Lock" architecture discussed in this paper makes it possible…

加速器物理 · 物理学 2014-11-18 B. Bevins , A. Hofler

The growing complexity of computational workloads has amplified the need for efficient and specialized hardware accelerators. Field Programmable Gate Arrays (FPGAs) and Graphics Processing Units (GPUs) have emerged as prominent solutions,…

硬件体系结构 · 计算机科学 2025-11-11 Arnab A Purkayastha , Jay Tharwani , Shobhit Aggarwal

Barriers that prevent programmers from using FPGAs include the need to work within vendor specific CAD tools, knowledge of hardware programming models, and the requirement to pass each design through synthesis, place and route. In this…

硬件体系结构 · 计算机科学 2016-03-04 Zeyad Aklah , Sen Ma , David Andrews

As field-programmable gate arrays become prevalent in critical application domains, their power consumption is of high concern. In this paper, we present and evaluate a power monitoring scheme capable of accurately estimating the runtime…

硬件体系结构 · 计算机科学 2020-09-04 Zhe Lin , Sharad Sinha , Wei Zhang