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Confidential containers protect cloud-native workloads using trusted execution environments (TEEs). However, existing Container-in-TEE designs (e.g., Confidential Containers (CoCo)) encapsulate the entire runtime within the TEE, inflating…

密码学与安全 · 计算机科学 2026-01-06 Di Lu , Mengna Sun , Qingwen Zhang , Yujia Liu , Jia Zhang , Xuewen Dong , Yulong Shen , Jianfeng Ma

In recent years, we have witnessed unprecedented growth in using hardware-assisted Trusted Execution Environments (TEE) or enclaves to protect sensitive code and data on commodity devices thanks to new hardware security features, such as…

密码学与安全 · 计算机科学 2024-05-14 Md Armanuzzaman , Ahmad-Reza Sadeghi , Ziming Zhao

Embedded and Internet-of-Things (IoT) devices are ubiquitous today, and the uprising of several botnets based on them (e.g., Mirai, Ripple20) raises issues about the security of such devices. Especially low-power devices often lack support…

密码学与安全 · 计算机科学 2024-04-08 Davide Bove , Lukas Panzer

Zero Trust Architecture (ZTA) has become a widely adopted model for securing enterprise environments, promoting continuous verification and minimal trust across systems. However, its application in mobile contexts remains limited, despite…

密码学与安全 · 计算机科学 2025-08-26 Alexander Tabalipa

IoT devices differ widely in crypto-supporting hardware, ranging from no hardware support to powerful accelerators supporting numerous of operations including protected key storage. An operating system should provide uniform access to these…

密码学与安全 · 计算机科学 2022-08-25 Lena Boeckmann , Peter Kietzmann , Leandro Lanzieri , Thomas Schmidt , Matthias Wählisch

The European Union technological sovereignty strategy centers around the RISC-V Instruction Set Architecture, with the European Processor Initiative leading efforts to build production-ready processors. Focusing on realizing a functional…

操作系统 · 计算机科学 2025-05-16 Petar Andrić , Aaron Call , Ramon Nou

Modern processors are increasingly featuring multiple cores, as well as support for hardware virtualization. While these processors are common in desktop and server-class computing, they are less prevalent in embedded and real-time systems.…

操作系统 · 计算机科学 2013-10-25 Richard West , Ye Li , Eric Missimer

This work presents a SystemC-TLM based simulator for a RISC-V microcontroller. This simulator is focused on simplicity and easy expandable of a RISC-V. It is built around a full RISC-V instruction set simulator that supports full RISC-V ISA…

硬件体系结构 · 计算机科学 2020-10-21 Màrius Montón

In TrustZone-assisted TEEs, the trusted OS has unrestricted access to both secure and normal world memory. Unfortunately, this architectural limitation has opened an aisle of exploration for attackers, which have demonstrated how to…

密码学与安全 · 计算机科学 2022-03-03 David Cerdeira , José Martins , Nuno Santos , Sandro Pinto

As a disruptive technology that originates from cryptocurrency, blockchain provides a trusted platform to facilitate industrial IoT (IIoT) applications. However, implementing a blockchain platform in IIoT scenarios confronts various…

密码学与安全 · 计算机科学 2022-01-19 Qing Yang , Hao Wang , Xiaoxiao Wu , Taotao Wang , Shengli Zhang , Naijin Liu

With the increasing popularity of Internet of Things (IoT) devices, securing sensitive user data has emerged as a major challenge. These devices often collect confidential information, such as audio and visual data, through peripheral…

密码学与安全 · 计算机科学 2023-12-21 Peterson Yuhala , Jämes Ménétrey , Pascal Felber , Marcelo Pasin , Valerio Schiavoni

Horizontal integration of access technologies to networks and services should be accompanied by some kind of convergence of authentication technologies. The missing link for the federation of user identities across the technological…

密码学与安全 · 计算机科学 2007-05-23 Nicolai Kuntze , Andreas U. Schmidt

Virtual Trusted Platform modules (TPMs) were proposed as a software-based alternative to the hardware-based TPMs to allow the use of their cryptographic functionalities in scenarios where multiple TPMs are required in a single platform,…

密码学与安全 · 计算机科学 2013-08-08 Sami Alsouri , Thomas Feller , Sunil Malipatlolla , Stefan Katzenbeisser

Covert channels enable information leakage across security boundaries of the operating system. Microarchitectural covert channels exploit changes in execution timing resulting from competing access to limited hardware resources. We use the…

密码学与安全 · 计算机科学 2020-05-06 Nils Wistoff , Moritz Schneider , Frank K. Gürkaynak , Luca Benini , Gernot Heiser

This applied research paper introduces a novel framework for integrating hardware security and blockchain functionality with grid-edge devices to establish a distributed cyber-security mechanism that verifies the provenance of messages to…

密码学与安全 · 计算机科学 2020-08-26 Shammya Shananda Saha , Christopher Gorog , Adam Moser , Anna Scaglione , Nathan G. Johnson

The fifth generation (5G) of cellular networks starts a paradigm shift from the traditional monolithic system design to a Service Based Architecture, that fits modern performance requirements and scales efficiently to new services. This…

密码学与安全 · 计算机科学 2024-05-21 Marinos Vomvas , Norbert Ludant , Guevara Noubir

RISC-V CPUs leverage the RVV (RISC-V Vector) extension to accelerate data-parallel workloads. In addition to arithmetic operations, RVV includes powerful permutation instructions that enable flexible element rearrangement within vector…

硬件体系结构 · 计算机科学 2025-06-02 Vasileios Titopoulos , George Alexakis , Chrysostomos Nicopoulos , Giorgos Dimitrakopoulos

Accurately measuring time passing is critical for many applications. However, in Trusted Execution Environments (TEEs) such as Intel SGX, the time source is outside the Trusted Computing Base: a malicious host can manipulate the TEE's…

IoT applications are one of the driving forces in making systems energy and power-efficient, given their resource constraints. However, because of security, latency, and transmission, we advocate for local computing through multi-processor…

The RVfpga course offers a solid introduction to computer architecture using the RISC-V instruction set and FPGA technology. It focuses on providing hands-on experience with real-world RISC-V cores, the VeeR EH1 and the VeeR EL2, developed…