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In formal synthesis of reactive systems an implementation of a system is automatically constructed from its formal specification. The great advantage of synthesis is that the resulting implementation is correct by construction; therefore…

计算机科学中的逻辑 · 计算机科学 2019-01-04 Hadas Kress-Gazit , Hazem Torfah

The classical LTL synthesis problem is purely qualitative: the given LTL specification is realized or not by a reactive system. LTL is not expressive enough to formalize the correctness of reactive systems with respect to some quantitative…

计算机科学中的逻辑 · 计算机科学 2013-01-10 Aaron Bohy , Véronique Bruyère , Emmanuel Filiot , Jean-François Raskin

Given a specification of linear-time temporal logic interpreted over finite traces (LTLf), the reactive synthesis problem asks to find a finitely-representable, terminating controller that reacts to the uncontrollable actions of an…

形式语言与自动机理论 · 计算机科学 2022-12-22 Luca Geatti , Marco Montali , Andrey Rivkin

In this paper, we study incremental LTLf synthesis -- a form of reactive synthesis where the goals are given incrementally while in execution. In other words, the protagonist agent is already executing a strategy for a certain goal when it…

人工智能 · 计算机科学 2026-03-03 Giuseppe De Giacomo , Yves Lespérance , Gianmarco Parretti , Fabio Patrizi , Moshe Y. Vardi

Most algorithms for the synthesis of reactive systems focus on the construction of finite-state machines rather than actual programs. This often leads to badly structured, unreadable code. In this paper, we present a bounded synthesis…

形式语言与自动机理论 · 计算机科学 2018-07-25 Carsten Gerstacker , Felix Klein , Bernd Finkbeiner

Reactive synthesis builds a system from a specification given as a temporal logic formula. Traditionally, reactive synthesis is defined for systems with Boolean input and output variables. Recently, new theories and techniques have been…

计算机科学中的逻辑 · 计算机科学 2021-08-03 Benedikt Maderbacher , Roderick Bloem

Reactive synthesis is the process of generating correct controllers from temporal logic specifications. Classical LTL reactive synthesis handles (propositional) LTL as a specification language. Boolean abstractions allow reducing LTLt…

计算机科学中的逻辑 · 计算机科学 2024-07-15 Andoni Rodríguez , Felipe Gorostiaga , César Sánchez

We discuss the problem of experimentally evaluating linear-time temporal logic (LTL) synthesis tools for reactive systems. We first survey previous such work for the currently publicly available synthesis tools, and then draw conclusions by…

计算机科学中的逻辑 · 计算机科学 2011-02-22 Rüdiger Ehlers

The idea of automatic synthesis of reactive programs starting from temporal logic (LTL) specifications is quite old, but was commonly thought to be infeasible due to the known double exponential complexity of the problem. However, new ideas…

计算机科学中的逻辑 · 计算机科学 2011-02-22 Andreas Morgenstern , Klaus Schneider

We consider the synthesis of distributed implementations for specifications in parameterized temporal logics such as PROMPT-LTL, which extends LTL by temporal operators equipped with parameters that bound their scope. For single process…

计算机科学中的逻辑 · 计算机科学 2018-02-28 Swen Jacobs , Leander Tentrup , Martin Zimmermann

Developing critical components, such as mission controllers or embedded systems, is a challenging task. Reactive synthesis is a technique to automatically produce correct controllers. Given a high-level specification written in LTL,…

计算机科学中的逻辑 · 计算机科学 2023-12-15 Matías Brizzio , César Sánchez

We introduce transductive program synthesis, a new formulation of the program synthesis task that explicitly leverages test inputs during synthesis. While prior approaches to program synthesis--whether based on natural language descriptions…

人工智能 · 计算机科学 2025-10-22 Kang-il Lee , Jahyun Koo , Seunghyun Yoon , Minbeom Kim , Hyukhun Koh , Dongryeol Lee , Kyomin Jung

We investigate the problem of controller synthesis for hyperproperties specified in the temporal logic HyperLTL. Hyperproperties are system properties that relate multiple execution traces. Hyperproperties can elegantly express…

计算机科学中的逻辑 · 计算机科学 2021-01-25 Borzoo Bonakdarpour , Bernd Finkbeiner

The problem of LTLf reactive synthesis is to build a transducer, whose output is based on a history of inputs, such that, for every infinite sequence of inputs, the conjoint evolution of the inputs and outputs has a prefix that satisfies a…

形式语言与自动机理论 · 计算机科学 2025-07-04 Alexandre Duret-Lutz , Shufang Zhu , Nir Piterman , Giuseppe de Giacomo , Moshe Y Vardi

This paper studies the controller synthesis problem for Linear Temporal Logic (LTL) specifications using (constrained) zonotope techniques. First, we implement (constrained) zonotope techniques to partition the state space and further to…

系统与控制 · 电气工程与系统科学 2021-11-16 Wei Ren , Julien Calbert , Raphael Jungers

Temporal synthesis attempts to construct reactive programs that satisfy a given declarative (LTL) formula. Practitioners have found it challenging to work exclusively with declarative specifications, and have found languages that combine…

计算机科学中的逻辑 · 计算机科学 2021-07-05 Shaun Azzopardi , Nir Piterman , Gerardo Schneider

In this paper we introduce a class of Linear Temporal Logic (LTL) specifications for which the problem of synthesizing controllers can be solved in polynomial time. The new class of specifications is an LTL fragment that we term Mode-Target…

最优化与控制 · 数学 2016-12-20 Ayca Balkan , Moshe Vardi , Paulo Tabuada

Synthesizing a reactive system from specifications given in linear temporal logic (LTL) is a classical problem, finding its applications in safety-critical systems design. We present our tool SemML, which won this year's LTL realizability…

人工智能 · 计算机科学 2025-04-18 Jan Kretinsky , Tobias Meggendorfer , Maximilian Prokop , Ashkan Zarkhah

In this paper, we focus on the problem of compositional synthesis of controllers enforcing signal temporal logic (STL) tasks over a class of continuous-time nonlinear interconnected systems. By leveraging the idea of funnel-based control,…

系统与控制 · 电气工程与系统科学 2023-09-27 Siyuan Liu , Adnane Saoud , Pushpak Jagtap , Dimos V. Dimarogonas , Majid Zamani

Reactive synthesis is an automatic way to translate a human intention expressed in some logic into a system of some kind. This thesis has two parts, devoted to logic and to systems. In Part I, we develop two new approaches to CTL*…

计算机科学中的逻辑 · 计算机科学 2018-08-29 Ayrat Khalimov