相关论文: Auto-Generation of Pipelined Hardware Designs for …
Analog circuit topology synthesis is integral to Electronic Design Automation (EDA), enabling the automated creation of circuit structures tailored to specific design requirements. However, the vast design search space and strict constraint…
Polar codes are the first class of constructive channel codes achieving the symmetric capacity of the binary-input discrete memoryless channels. But the analysis and construction of polar codes involve the complex iterative-calculation. In…
The problem of polar coding for an arbitrary sequence of independent binary-input memoryless symmetric (BMS) channels $\left\{W_i\right\}_{i=1}^{N}$ is considered. The sequence of channels is assumed to be completely known to both the…
The polarization decomposition of arbitrary binary-input memoryless channels (BMCs) is studied in this work. By introducing the polarization factor (PF), defined in terms of the conditional entropy of the channel output under various input…
It is shown that all polar encoding schemes of rate $R>\frac{1}{2}$ of block length $N$ implemented according to the Thompson VLSI model must take energy $E\ge\Omega\left(N^{3/2}\right)$. This lower bound is achievable up to polylogarithmic…
A scheme for concatenating the recently invented polar codes with interleaved block codes is considered. By concatenating binary polar codes with interleaved Reed-Solomon codes, we prove that the proposed concatenation scheme captures the…
This paper describes a C code generator for ACL2 that recognizes ACL2 representations of C constructs, according to a shallow embedding of C in ACL2, and translates those representations to the represented C constructs. The code generator…
We present a C++ library, TLoops, which uses a hierarchy of expression templates to represent operations upon tensorial quantities in single lines of C++ code that resemble analytic equations. These expressions may be run as-is, but may…
I present the Automated Line Fitting Algorithm, ALFA, a new code which can fit emission line spectra of arbitrary wavelength coverage and resolution, fully automatically. In contrast to traditional emission line fitting methods which…
Polar codes have attracted the attention of academia and industry alike in the past decade, such that the 5$^\text{th}$ generation wireless systems (5G) standardization process of the 3$^\text{th}$ generation partnership project (3GPP)…
Semiconductors form the backbone of modern electronics, with their manufacturing and testing relying on highly specialized equipment and domain-specific programming languages. Equipment languages such as the Algorithmic Pattern Generator…
The generation of large, high-quality datasets for code understanding and generation remains a significant challenge, particularly when aligning decompiled binaries with their original source code. To address this, we present CodableLLM, a…
It is well known that to fulfill their full potential, the design of polar codes must be tailored to their intended decoding algorithm. While for successive cancellation (SC) decoding, information theoretically optimal constructions are…
Recently, a new class of error-control codes, the polar codes, have attracted much attention. The polar codes are the first known class of capacity-achieving codes for many important communication channels. In addition, polar codes have…
To advance Polar code design for 6G applications, we develop a reinforcement learning-based universal sequence design framework that is extensible and adaptable to diverse channel conditions and decoding strategies. Crucially, our method…
This work introduces self-infilling code generation, a general framework that incorporates infilling operations into auto-regressive decoding. Our approach capitalizes on the observation that recent infilling-capable code language models…
In this work, we present a concatenated repetition-polar coding scheme that is aimed at applications requiring highly unbalanced unequal bit-error protection, such as the Beam Interlock System of the Large Hadron Collider at CERN. Even…
In the context of mapping high-level algorithms to hardware, we consider the basic problem of generating an efficient hardware implementation of a single threaded program, in particular, that of an inner loop. We describe a control-flow…
Programmable Logic Devices (PLDs) continue to grow in size and currently contain several millions of gates. At the same time, research effort is going into higher-level hardware synthesis methodologies for reconfigurable computing that can…
Arikan's recursive code construction is designed to polarize a collection of memoryless channels into a set of good and a set of bad channels, and it can be efficiently decoded using successive cancellation. It was recently shown that the…